jan-henrik/eurorack
1
0
Fork 0
mirror of https://github.com/jhbruhn/eurorack.git synced 2025-03-15 19:15:50 +00:00
Code Issues Projects Releases Packages Wiki Activity
eurorack/stereo_mix/hardware_design/pcb/simulation/digital_tests.asc

161 lines
3.3 KiB
Text
Raw Normal View History

Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
Version 4
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SHEET 1 1208 680
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WIRE 304 32 272 32
WIRE 624 32 608 32
WIRE 96 144 80 144
WIRE 176 144 176 64
WIRE 192 144 192 32
WIRE 192 144 176 144
WIRE 208 144 192 144
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
WIRE 384 144 384 32
WIRE 384 144 368 144
WIRE 400 144 384 144
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WIRE 528 144 528 32
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
WIRE 528 144 480 144
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WIRE 544 144 528 144
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
WIRE 304 160 304 32
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WIRE 304 160 272 160
WIRE 624 160 624 32
WIRE 624 160 608 160
WIRE 208 176 192 176
WIRE 544 176 496 176
WIRE 80 192 80 144
WIRE 192 192 192 176
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
WIRE 368 256 368 144
WIRE 528 320 528 144
WIRE 528 320 512 320
WIRE 432 368 432 320
WIRE 464 368 432 368
WIRE 352 400 320 400
WIRE 464 400 464 368
WIRE 464 400 432 400
WIRE 320 480 320 400
WIRE 320 480 272 480
WIRE 368 480 320 480
WIRE 112 496 112 480
WIRE 192 496 192 480
WIRE 192 496 112 496
WIRE 464 496 464 400
WIRE 464 496 432 496
WIRE 112 512 112 496
WIRE 368 512 352 512
WIRE 352 560 352 512
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
FLAG -192 208 0
FLAG -192 352 0
FLAG -80 352 0
FLAG -192 128 +5V
FLAG 240 128 +5V
FLAG -192 272 -12V
FLAG -80 272 +12V
FLAG 240 192 0
FLAG 80 272 0
FLAG -80 208 0
FLAG -80 128 -10V
FLAG 96 64 -10V
FLAG 192 192 0
FLAG 576 192 -12V
FLAG 576 128 +12V
FLAG 496 176 0
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
FLAG 368 336 0
FLAG 112 592 0
FLAG -352 128 +4V096
FLAG -352 208 0
FLAG 112 400 +4V096
FLAG 400 528 -12V
FLAG 352 560 0
FLAG 400 464 +12V
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
SYMBOL voltage -80 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -192 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage -192 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SYMATTR Value PULSE(-10 10 0 .1 .1 0 .2)
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
SYMBOL res 192 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 288 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 24k
SYMBOL res 192 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage -80 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value -10
SYMBOL Opamps\\LT1677 240 96 R0
SYMATTR InstName U1
SYMBOL TL072 576 96 R0
SYMATTR InstName U2
SYMBOL res 496 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 24k
SYMBOL res 624 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SYMBOL res 400 16 R90
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SYMATTR InstName R9
SYMATTR Value {X}
SYMBOL res 384 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R10
SYMATTR Value {100k-X}
SYMBOL res 528 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
SYMATTR Value 100k
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SYMBOL res 96 384 R0
SYMATTR InstName R12
SYMATTR Value {X}
SYMBOL res 96 496 R0
SYMATTR InstName R13
SYMATTR Value {100k-X}
SYMBOL voltage -352 112 R0
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SYMATTR Value 4.096
SYMBOL TL072 400 432 R0
SYMATTR InstName U4
SYMBOL res 288 464 R90
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
SYMATTR InstName R14
SYMATTR Value 43k
SYMBOL res 448 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
Add stereo mix back digital pcb and tests
2019-11-16 08:36:50 +00:00
SYMATTR Value 100k
Add simulations and schematic for next hardware revision, adding the missing variable bias to the opamp after the MDAC
2019-12-05 21:30:07 +00:00
TEXT -96 216 Left 2 !.tran 1
TEXT 720 80 Left 2 !.step param X .1k 99.9k 1k
Reference in a new issue Copy permalink