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Add new implementation start of stereo_mix
This commit is contained in:
parent
6b5d815f74
commit
fea326c04c
39 changed files with 93045 additions and 117 deletions
103
stereo_mix/drivers/dac.h
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103
stereo_mix/drivers/dac.h
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#pragma once
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#include <stm32f0xx.h>
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#include "stm32f0xx_gpio.h"
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#include "stmlib/stmlib.h"
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#include <stm32f0xx_conf.h>
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#include <stm32f0xx_rcc.h>
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#include <stm32f0xx_spi.h>
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class Dac { // MCP4xx2 dac implementation
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public:
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void Init(GPIO_TypeDef* ssGpioPort_, uint16_t ssGpioPin_)
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{
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ssGpioPort = ssGpioPort_;
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ssGpioPin = ssGpioPin_;
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// init SS/CS/RST GPIO
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
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GPIO_InitTypeDef gpio_init;
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GPIO_StructInit(&gpio_init);
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gpio_init.GPIO_Mode = GPIO_Mode_OUT;
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gpio_init.GPIO_OType = GPIO_OType_PP;
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gpio_init.GPIO_Speed = GPIO_Speed_50MHz;
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gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;
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gpio_init.GPIO_Pin = ssGpioPin;
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GPIO_Init(ssGpioPort, &gpio_init);
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GPIO_SetBits(ssGpioPort, ssGpioPin);
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// init AF GPIO
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1 | RCC_APB2Periph_SYSCFG, ENABLE);
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GPIO_StructInit(&gpio_init);
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gpio_init.GPIO_Mode = GPIO_Mode_AF;
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gpio_init.GPIO_OType = GPIO_OType_PP;
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gpio_init.GPIO_Speed = GPIO_Speed_50MHz;
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gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;
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gpio_init.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOB, &gpio_init);
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource3, GPIO_AF_0);
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource4, GPIO_AF_0);
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_0);
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// init SPI
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SPI_I2S_DeInit(SPI1);
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// Initialize SPI TODO: check which config we need
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SPI_InitTypeDef spi_init;
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SPI_StructInit(&spi_init);
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spi_init.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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spi_init.SPI_Mode = SPI_Mode_Master;
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spi_init.SPI_DataSize = SPI_DataSize_16b;
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spi_init.SPI_CPOL = SPI_CPOL_High;
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spi_init.SPI_CPHA = SPI_CPHA_1Edge;
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spi_init.SPI_NSS = SPI_NSS_Soft;
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spi_init.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
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spi_init.SPI_FirstBit = SPI_FirstBit_MSB;
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spi_init.SPI_CRCPolynomial = 7;
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SPI_Init(SPI1, &spi_init);
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SPI_Cmd(SPI1, ENABLE);
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};
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void Write16(uint8_t channel, uint16_t value, uint8_t gain, uint8_t buffered)
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{
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if (channel > 1)
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return; // only 2 channels available
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if (buffered > 1)
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return; // buffered can only be 0 or 1
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if (gain > 2 || gain < 1)
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return; // gain has to be 1 or 2
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gain = !(gain - 1);
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value >>= 4; // the dac supports a maximum of 12 bits precision
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value |= channel << 15; // select channel
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value |= buffered << 14; // set buffered
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value |= gain << 13; // set gain
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value |= 1 << 12; // shutdown always set to 1
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GPIO_ResetBits(ssGpioPort, ssGpioPin);
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SPI_I2S_SendData16(SPI1, value);
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//SPI_I2S_SendData16(SPI1, value); // MSB first, specified in config
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while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET) {
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asm("nop");
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}
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while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET) {
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asm("nop");
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}
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GPIO_SetBits(ssGpioPort, ssGpioPin);
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};
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void Write16(uint8_t channel, uint16_t value)
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{
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Write16(channel, value, 1, 0);
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};
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private:
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GPIO_TypeDef* ssGpioPort;
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uint16_t ssGpioPin;
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};
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42
stereo_mix/hardware_design/pcb/simulation/Draft4.log
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42
stereo_mix/hardware_design/pcb/simulation/Draft4.log
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Circuit: * Z:\home\jhbruhn\eurorack\eurorack-dev-environment\eurorack-modules\stereo_mix\hardware_design\pcb\simulation\Draft4.asc
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Instance "m:u1:6": Length shorter than recommended for a level 2 MOSFET.
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Instance "m:u1:5": Length shorter than recommended for a level 2 MOSFET.
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Direct Newton iteration failed to find .op point. (Use ".option noopiter" to skip.)
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Starting Gmin stepping
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Gmin = 10
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Gmin = 1.07374
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Gmin = 0.115292
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Gmin = 0.0123794
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Gmin = 0.00132923
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Gmin = 0.000142725
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Gmin = 1.5325e-005
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Gmin = 1.6455e-006
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Gmin = 1.76685e-007
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Gmin = 1.89714e-008
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Gmin = 2.03704e-009
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Gmin = 2.18725e-010
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Gmin = 2.34854e-011
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Gmin = 2.52173e-012
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Gmin = 2.70769e-013
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Gmin = 0
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Gmin stepping succeeded in finding the operating point.
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Date: Sat Mar 14 19:22:02 2020
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Total elapsed time: 0.109 seconds.
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tnom = 27
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temp = 27
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method = modified trap
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totiter = 2512
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traniter = 2090
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tranpoints = 1046
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accept = 1046
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rejected = 0
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matrix size = 43
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fillins = 28
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solver = Normal
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Matrix Compiler1: 3.38 KB object code size 0.9/0.4/[0.2]
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Matrix Compiler2: 4.15 KB object code size 0.5/0.6/[0.3]
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BIN
stereo_mix/hardware_design/pcb/simulation/Draft4.op.raw
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BIN
stereo_mix/hardware_design/pcb/simulation/Draft4.op.raw
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Binary file not shown.
BIN
stereo_mix/hardware_design/pcb/simulation/Draft4.raw
Normal file
BIN
stereo_mix/hardware_design/pcb/simulation/Draft4.raw
Normal file
Binary file not shown.
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# Copyright 2012 Emilie Gillet.
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# Copyright 2013 Emilie Gillet.
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# Author: Emilie Gillet (emilie.o.gillet@gmail.com)
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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# THE SOFTWARE.
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#
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# See http://creativecommons.org/licenses/MIT/ for more information.
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VERSION = 0.1
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MCU_NAME = 328
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# System specifications
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F_CRYSTAL = 8000000L
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F_CPU = 72000000L
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SYSCLOCK = SYSCLK_FREQ_72MHz
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FAMILY = f0xx
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# USB = enabled
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#APPLICATION = true
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#BOOTLOADER = midi2cv_bootloader
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# Preferred upload command
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UPLOAD_COMMAND = upload_jtag
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# Packages to build
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TARGET = stereo_mix
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PACKAGES = avrlib avrlib/devices stereo_mix
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PACKAGES = stereo_mix \
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stereo_mix/drivers \
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stmlib/utils \
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stmlib/system
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RESOURCES = stereo_mix/resources
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PROGRAMMER = atmelice_isp
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LFUSE = ef
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HFUSE = d8
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EFUSE = 05
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LOCK = ff
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include stmlib/makefile.inc
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include avrlib/makefile.mk
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include $(DEP_FILE)
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# Rule for building the firmware update file
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wav: $(TARGET_BIN)
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python avr_audio_bootloader/fsk/encoder.py \
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-s 40000 -b 16 -n 8 -z 4 -p 128 -g 128 -k 10 \
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$(TARGET_BIN)
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bootstrap_all:
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make -f stereo_mix/makefile
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make -f stereo_mix/bootloader/makefile
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make -f stereo_mix/bootloader/makefile fuses
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$(AVRDUDE) -B 1 $(AVRDUDE_COM_OPTS) $(AVRDUDE_ISP_OPTS) \
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-U flash:w:build/stereo_mix/stereo_mix.hex:i \
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-U flash:w:build/stereo_mix_bootloader/stereo_mix_bootloader.hex:i \
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-U lock:w:0xff:m
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#include "avrlib/adc.h"
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#include "avrlib/avrlib.h"
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#include "avrlib/boot.h"
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#include "avrlib/devices/mcp492x.h"
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#include "avrlib/gpio.h"
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#include "avrlib/spi.h"
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#include "avrlib/time.h"
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#include "avrlib/watchdog_timer.h"
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#include "stereo_mix/resources.h"
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#include "drivers/dac.h"
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using namespace avrlib;
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using namespace stereo_mix;
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// Default interrupt handlers.
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extern "C" {
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void NMI_Handler() {}
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void HardFault_Handler()
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{
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while (1)
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;
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}
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void MemManage_Handler()
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{
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while (1)
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;
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}
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void BusFault_Handler()
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{
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while (1)
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;
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}
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void UsageFault_Handler()
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{
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while (1)
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;
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}
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void SVC_Handler() {}
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void DebugMon_Handler() {}
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void PendSV_Handler() {}
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typedef SpiMaster<NumberedGpio<0>, MSB_FIRST, 2> dac1Spi;
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typedef Dac<dac1Spi, BUFFERED_REFERENCE, 1> Dac1;
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typedef SpiMaster<NumberedGpio<1>, MSB_FIRST, 2> dac2Spi;
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typedef Dac<dac2Spi, BUFFERED_REFERENCE, 1> Dac2;
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typedef SpiMaster<NumberedGpio<2>, MSB_FIRST, 2> dac3Spi;
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typedef Dac<dac3Spi, BUFFERED_REFERENCE, 1> Dac3;
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typedef SpiMaster<NumberedGpio<3>, MSB_FIRST, 2> dac4Spi;
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typedef Dac<dac4Spi, BUFFERED_REFERENCE, 1> Dac4;
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// called every 1ms
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void SysTick_Handler()
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{
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}
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}
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typedef SpiMaster<NumberedGpio<4>, MSB_FIRST, 2> oDac1Spi;
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typedef Dac<oDac1Spi, BUFFERED_REFERENCE, 0> oDac1;
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typedef SpiMaster<NumberedGpio<5>, MSB_FIRST, 2> oDac2Spi;
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typedef Dac<oDac2Spi, BUFFERED_REFERENCE, 0> oDac2;
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typedef SpiMaster<NumberedGpio<6>, MSB_FIRST, 2> oDac3Spi;
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typedef Dac<oDac3Spi, BUFFERED_REFERENCE, 0> oDac3;
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typedef SpiMaster<NumberedGpio<7>, MSB_FIRST, 2> oDac4Spi;
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typedef Dac<oDac4Spi, BUFFERED_REFERENCE, 0> oDac4;
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typedef AdcInputScanner AnalogInputs;
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#define NUM_CHANNELS 4
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uint32_t volume[NUM_CHANNELS];
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uint16_t pan[NUM_CHANNELS * 2];
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Dac dacs[8];
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int main(void)
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{
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Boot(true);
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Dac1::Init();
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Dac2::Init();
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Dac3::Init();
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Dac4::Init();
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oDac1::Init();
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oDac2::Init();
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oDac3::Init();
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oDac4::Init();
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AnalogInputs::Init();
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AnalogInputs::set_num_inputs(8);
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#define WRITE(DAC, ODAC, N) \
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DAC::Write((volume[N] * pan[N * NUM_CHANNELS]) >> 12, 0); \
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ODAC::Write((volume[N] * pan[N * NUM_CHANNELS]) >> 12, 0); \
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DAC::Write((volume[N] * pan[N * NUM_CHANNELS + 1]) >> 12, 1); \
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ODAC::Write((volume[N] * pan[N * NUM_CHANNELS + 1]) >> 12, 1);
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SystemInit();
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dacs[0].Init(GPIOB, GPIO_Pin_8);
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dacs[1].Init(GPIOB, GPIO_Pin_9);
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dacs[2].Init(GPIOB, GPIO_Pin_10);
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dacs[3].Init(GPIOB, GPIO_Pin_11);
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dacs[4].Init(GPIOA, GPIO_Pin_8);
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dacs[5].Init(GPIOA, GPIO_Pin_9);
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dacs[6].Init(GPIOA, GPIO_Pin_10);
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dacs[7].Init(GPIOA, GPIO_Pin_11);
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while (true) {
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ResetWatchdog();
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int i = AnalogInputs::current_pin() % NUM_CHANNELS;
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volume[i] = pgm_read_word_near(lut_res_linear_to_exp + (AnalogInputs::Read(i) >> 1));
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pan[i * NUM_CHANNELS] = pgm_read_word(lut_res_left_sin_pan + (AnalogInputs::Read(i + NUM_CHANNELS) >> 1));
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pan[i * NUM_CHANNELS + 1] = pgm_read_word(lut_res_right_cos_pan + (AnalogInputs::Read(i + NUM_CHANNELS) >> 1));
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switch (i) {
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case 0:
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WRITE(Dac1, oDac1, i);
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break;
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case 1:
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WRITE(Dac2, oDac2, i);
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break;
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case 2:
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WRITE(Dac3, oDac3, i);
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break;
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case 3:
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WRITE(Dac4, oDac4, i);
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break;
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for (uint16_t i = 0; i < 65535; i++) {
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dacs[0].Write16(0, i);
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dacs[0].Write16(1, 65535 - i);
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}
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AnalogInputs::Scan();
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}
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}
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TIMER_0_TICK
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{
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TickSystemClock();
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}
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0
stereo_mix_old/__init__.py
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0
stereo_mix_old/__init__.py
Normal file
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width = 75;
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panel_width = 76.2;
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thickness = 2;
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jack_radius = 6.2 / 2;
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pot_radius = 9.1 / 2;
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led_radius = 5.1 / 2;
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switch_radius = 5.1 / 2;
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x_offset = (128.5 - 100) / 2;
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y_offset = (panel_width - width) / 2;
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jacks = [[6.35, 91.44], [6.35, 74.93], [6.35, 58.42], [6.35, 41.91], [6.35, 22.352], [6.35, 7.62],
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[19.05, 91.44], [19.05, 74.93], [19.05, 58.42], [19.05, 41.91], [19.05, 22.352], [19.05, 7.62],
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[31.75, 22.352], [31.75, 7.62],
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[44.45, 22.352], [44.45, 7.62],
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[64.77, 22.352], [64.77, 7.62]];
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pots = [[44.7675, 91.44], [44.7675, 74.93], [44.7675, 58.42], [44.7675, 41.91],
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[64.77, 91.44], [64.77, 74.93], [64.77, 58.42], [64.77, 41.91]];
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leds = [];
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switches = [];
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difference() {
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cube(size = [128.5, panel_width, thickness]);
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for (jack = jacks)
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translate([jack[1] + x_offset, jack[0]+y_offset, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = jack_radius, $fn = 50);
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for (pot = pots)
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translate([pot[1] + x_offset, pot[0]+y_offset, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = pot_radius, $fn = 50);
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for (led = leds)
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translate([led[1] + x_offset, led[0]+y_offset, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = led_radius, $fn = 50);
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for (switch = switches)
|
||||
translate([switch[1] + x_offset, switch[0]+y_offset, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = switch_radius, $fn = 50);
|
||||
// top hole
|
||||
translate([125.5, 7.5, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = 3.2 / 2, $fn = 10);
|
||||
|
||||
//bottom hole
|
||||
translate([3, 7.5, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = 3.2 / 2, $fn = 100);
|
||||
|
||||
// top hole
|
||||
translate([125.5, ((panel_width / 5.08) - 2) * 5.08, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = 3.2 / 2, $fn = 10);
|
||||
|
||||
//bottom hole
|
||||
translate([3, ((panel_width / 5.08) - 2) * 5.08, -thickness / 2]) linear_extrude(height = thickness * 2) circle(r = 3.2 / 2, $fn = 100);
|
||||
}
|
||||
43486
stereo_mix_old/hardware_design/panel/stereo_mix_panel_3dprint.stl
Normal file
43486
stereo_mix_old/hardware_design/panel/stereo_mix_panel_3dprint.stl
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,284 @@
|
|||
{
|
||||
"author": {
|
||||
"email": "jh.bruhn@me.com",
|
||||
"name": "Jan-Henrik Bruhn"
|
||||
},
|
||||
"description": {
|
||||
"EN": "EAGLE default 2 layer CAM job."
|
||||
},
|
||||
"output_type": "zip",
|
||||
"outputs": [
|
||||
{
|
||||
"filename_prefix": "CAMOutputs/GerberFiles",
|
||||
"format_specifier": {
|
||||
"decimal": 4,
|
||||
"integer": 3
|
||||
},
|
||||
"generate_job_file": true,
|
||||
"output_type": "gerber",
|
||||
"outputs": [
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Copper",
|
||||
"layer": 1,
|
||||
"layer_details": "mixed",
|
||||
"layer_type": "top"
|
||||
},
|
||||
"filename_format": "%PREFIX/copper_top.gbr",
|
||||
"layers": [
|
||||
1,
|
||||
17,
|
||||
18
|
||||
],
|
||||
"name": "Top Copper",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Copper",
|
||||
"layer": 2,
|
||||
"layer_details": "mixed",
|
||||
"layer_type": "bottom"
|
||||
},
|
||||
"filename_format": "%PREFIX/copper_bottom.gbr",
|
||||
"layers": [
|
||||
16,
|
||||
17,
|
||||
18
|
||||
],
|
||||
"name": "Bottom Copper",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": true,
|
||||
"config": {
|
||||
"file_function": "Profile",
|
||||
"plating": "non-plated"
|
||||
},
|
||||
"filename_format": "%PREFIX/profile.gbr",
|
||||
"layers": [
|
||||
],
|
||||
"milling": true,
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Soldermask",
|
||||
"index": 1,
|
||||
"layer_type": "top"
|
||||
},
|
||||
"filename_format": "%PREFIX/soldermask_top.gbr",
|
||||
"layers": [
|
||||
29
|
||||
],
|
||||
"name": "Soldermask Top",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Soldermask",
|
||||
"index": 1,
|
||||
"layer_type": "bottom"
|
||||
},
|
||||
"filename_format": "%PREFIX/soldermask_bottom.gbr",
|
||||
"layers": [
|
||||
30
|
||||
],
|
||||
"name": "Soldermask Bottom",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Paste",
|
||||
"layer_type": "top"
|
||||
},
|
||||
"filename_format": "%PREFIX/solderpaste_top.gbr",
|
||||
"layers": [
|
||||
31
|
||||
],
|
||||
"milling": false,
|
||||
"name": "Solderpaste Top",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Paste",
|
||||
"layer_type": "bottom"
|
||||
},
|
||||
"filename_format": "%PREFIX/solderpaste_bottom.gbr",
|
||||
"layers": [
|
||||
32
|
||||
],
|
||||
"milling": false,
|
||||
"name": "Solderpaste Bottom",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Legend",
|
||||
"index": 1,
|
||||
"layer_type": "top"
|
||||
},
|
||||
"filename_format": "%PREFIX/silkscreen_top.gbr",
|
||||
"layers": [
|
||||
21,
|
||||
25,
|
||||
51
|
||||
],
|
||||
"milling": false,
|
||||
"name": "Silkscreen Top",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
},
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"board_outline": false,
|
||||
"config": {
|
||||
"file_function": "Legend",
|
||||
"index": 1,
|
||||
"layer_type": "bottom"
|
||||
},
|
||||
"filename_format": "%PREFIX/silkscreen_bottom.gbr",
|
||||
"layers": [
|
||||
22,
|
||||
26,
|
||||
52
|
||||
],
|
||||
"milling": false,
|
||||
"name": "Silkscreen Bottom",
|
||||
"polarity": "positive",
|
||||
"type": "gerber_layer"
|
||||
}
|
||||
],
|
||||
"version": "RS274X"
|
||||
},
|
||||
{
|
||||
"filename_prefix": "CAMOutputs/DrillFiles",
|
||||
"format_specifier": {
|
||||
"decimal": 3,
|
||||
"integer": 3
|
||||
},
|
||||
"output_type": "drill",
|
||||
"outputs": [
|
||||
{
|
||||
"advanced_options": {
|
||||
"mirror": false,
|
||||
"offset_x": 0,
|
||||
"offset_y": 0,
|
||||
"rotate": false,
|
||||
"upside_down": false
|
||||
},
|
||||
"filename_format": "%DRILLPREFIX/drill_%FROM_%TO.xln",
|
||||
"name": "Auto Drill",
|
||||
"type": "autodrills"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"filename_prefix": "CAMOutputs/Assembly",
|
||||
"output_type": "assembly",
|
||||
"outputs": [
|
||||
{
|
||||
"filename_format": "%ASSEMBLYPREFIX/%N",
|
||||
"list_attribute": true,
|
||||
"list_type": "values",
|
||||
"name": "Bill of Material",
|
||||
"output_format": "txt",
|
||||
"type": "bom"
|
||||
},
|
||||
{
|
||||
"filename_format": "%ASSEMBLYPREFIX/PnP_%N_%BOARDSIDE",
|
||||
"name": "Pick and Place",
|
||||
"output_format": "txt",
|
||||
"type": "pick_and_place"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"filename_prefix": "CAMOutputs/DrawingFiles",
|
||||
"output_type": "drawing",
|
||||
"outputs": [
|
||||
]
|
||||
}
|
||||
],
|
||||
"timestamp": "2020-03-13T11:03:29",
|
||||
"type": "EAGLE CAM job",
|
||||
"units": "metric",
|
||||
"version": "9.2.0"
|
||||
}
|
||||
Binary file not shown.
|
|
@ -0,0 +1,31 @@
|
|||
"Comment","Designator","Footprint","LCSC Part #","LCSC Part Type"
|
||||
"","VR1, VR2, VR3, VR4, VR5, VR6, VR7, VR8","9MM_SNAP-IN_POT","",""
|
||||
"","JP1, JP2","JP2","",""
|
||||
"100k","R2, R4, R6, R8, R21, R22, R24, R27, R29, R30, R31, R32, R34, R36, R38, R40, R53, R54, R55, R56, R61, R62, R63, R64, R66, R68, R70, R72, R81, R82, R83, R84, R86, R87, R88, R89","0402_R","",""
|
||||
"100nF","C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C23, C24, C25, C28, C29, C30, C31, C34, C35, C40, C42","0402_C","",""
|
||||
"10k","R85","0402_R","",""
|
||||
"10uF","C37, C38, C39, C41","A/3216-18R","",""
|
||||
"15k","R9, R10, R11, R12, R41, R42, R43, R44","0402_R","",""
|
||||
"1N4148W","D1, D2","SOD123","",""
|
||||
"200k","R65, R67, R69, R71, R77, R78, R79, R80","0402_R","",""
|
||||
"22pF","C26, C27","0402_C","",""
|
||||
"300k","R23, R25, R26, R28, R57, R58, R59, R60","0402_R","",""
|
||||
"33k","R73, R74, R75, R76","0402_R","",""
|
||||
"4.7nF","C19, C20, C21, C22","0402_C","",""
|
||||
"4051D","IC1","SO16","",""
|
||||
"470R","R90","0402_R","",""
|
||||
"47k","R13, R14, R15, R16, R17, R18, R19, R20, R45, R46, R47, R48, R49, R50, R51, R52","0402_R","",""
|
||||
"6.8pF","C32, C33","0402_C","",""
|
||||
"8MHz","X1","NX5032","",""
|
||||
"91k","R1, R3, R5, R7, R33, R35, R37, R39","0402_R","",""
|
||||
"AMS1117-3.3","IC2","SOT223","",""
|
||||
"CORTEX_DEBUG_PTH","J17","2X5-PTH-1.27MM","",""
|
||||
"EURO_POWER_LOCKFAT-LOCK","C36","EURO_PWR_HEADER_LOCK","",""
|
||||
"LM4040AIM3-10.0","D3","SOT23","",""
|
||||
"MCP4822E-SN","U1, U2, U9, U10","SOIC8","",""
|
||||
"MCP4922E/SL","U5, U6, U13, U14","SO-14","",""
|
||||
"MCP6002T-I/SN","U3, U4, U11, U12, U17, U18, U19, U20","SOIC8","",""
|
||||
"OSHW-LOGOS","LOGO1","OSHW-LOGO-S","",""
|
||||
"STM32F030C8T6","U21","LQFP48","",""
|
||||
"TL072CD","U7, U8, U15, U16, U22","SOIC8","",""
|
||||
"WQP-PJ301M-12_JACK","J1, J2, J3, J4, J5, J6, J7, J8, J9, J10, J11, J12, J13, J14, J15, J16, J18, J19","WQP-PJ301M-12_JACK","",""
|
||||
|
160
stereo_mix_old/hardware_design/pcb/assembly/stereo_mix_cpl.csv
Normal file
160
stereo_mix_old/hardware_design/pcb/assembly/stereo_mix_cpl.csv
Normal file
|
|
@ -0,0 +1,160 @@
|
|||
"Designator","Mid X","Mid Y","Layer","Rotation"
|
||||
"C1","34.29","99.06","Bottom",0
|
||||
"C2","45.09","93.98","Bottom",0
|
||||
"C3","34.29","80.01","Bottom",0
|
||||
"C4","41.91","73.66","Bottom",0
|
||||
"C5","31.75","59.69","Bottom",180
|
||||
"C6","40.64","30.48","Bottom",0
|
||||
"C7","35.56","36.83","Bottom",180
|
||||
"C8","41.91","52.07","Bottom",0
|
||||
"C9","13.97","87.63","Bottom",180
|
||||
"C10","13.97","66.04","Bottom",180
|
||||
"C11","13.97","44.45","Bottom",180
|
||||
"C12","13.97","22.86","Bottom",180
|
||||
"C13","67.31","36.20","Bottom",180
|
||||
"C14","66.04","57.79","Bottom",180
|
||||
"C15","66.67","98.43","Bottom",180
|
||||
"C16","64.77","79.38","Bottom",180
|
||||
"C17","16.51","82.55","Bottom",90
|
||||
"C18","16.51","60.96","Bottom",90
|
||||
"C19","18.41","90.17","Bottom",90
|
||||
"C20","18.41","68.58","Bottom",90
|
||||
"C21","18.41","46.99","Bottom",90
|
||||
"C22","18.41","25.40","Bottom",90
|
||||
"C23","16.51","39.37","Bottom",90
|
||||
"C24","16.51","17.78","Bottom",90
|
||||
"C25","41.91","8.89","Bottom",270
|
||||
"C26","52.07","21.59","Bottom",0
|
||||
"C27","48.26","21.59","Bottom",180
|
||||
"C28","44.45","37.47","Bottom",270
|
||||
"C29","56.52","28.58","Bottom",180
|
||||
"C30","45.72","27.30","Bottom",0
|
||||
"C31","46.99","50.80","Bottom",0
|
||||
"C32","17.78","14.61","Bottom",180
|
||||
"C33","7.62","13.34","Bottom",180
|
||||
"C34","12.70","9.53","Bottom",180
|
||||
"C35","7.62","14.61","Bottom",0
|
||||
"C37","66.04","10.16","Bottom",0
|
||||
"C38","66.04","6.35","Bottom",180
|
||||
"C39","33.02","3.81","Bottom",90
|
||||
"C40","18.41","6.35","Bottom",90
|
||||
"C41","43.18","3.81","Bottom",270
|
||||
"C42","33.02","7.62","Bottom",0
|
||||
"D1","65.41","13.34","Bottom",180
|
||||
"D2","65.41","3.18","Bottom",0
|
||||
"D3","20.32","2.54","Bottom",180
|
||||
"IC1","50.16","58.42","Bottom",270
|
||||
"IC2","38.10","5.08","Bottom",270
|
||||
"R1","3.81","89.54","Bottom",180
|
||||
"R2","3.81","90.81","Bottom",180
|
||||
"R3","13.97","90.17","Bottom",0
|
||||
"R4","13.97","91.44","Bottom",0
|
||||
"R5","3.81","67.95","Bottom",180
|
||||
"R6","3.81","69.22","Bottom",180
|
||||
"R7","13.97","68.58","Bottom",0
|
||||
"R8","13.97","69.85","Bottom",0
|
||||
"R9","3.81","88.27","Bottom",180
|
||||
"R10","13.97","88.90","Bottom",0
|
||||
"R11","3.81","66.67","Bottom",180
|
||||
"R12","13.97","67.31","Bottom",0
|
||||
"R13","45.09","97.79","Bottom",0
|
||||
"R14","34.29","96.52","Bottom",180
|
||||
"R15","34.29","95.25","Bottom",180
|
||||
"R16","45.09","95.25","Bottom",0
|
||||
"R17","41.91","77.47","Bottom",0
|
||||
"R18","31.75","76.84","Bottom",180
|
||||
"R19","31.75","74.30","Bottom",180
|
||||
"R20","41.91","76.20","Bottom",0
|
||||
"R21","34.29","93.98","Bottom",180
|
||||
"R22","31.75","75.56","Bottom",0
|
||||
"R23","45.09","99.06","Bottom",0
|
||||
"R24","45.09","96.52","Bottom",180
|
||||
"R25","34.29","97.79","Bottom",180
|
||||
"R26","41.91","78.74","Bottom",0
|
||||
"R27","41.91","74.93","Bottom",180
|
||||
"R28","31.75","78.11","Bottom",180
|
||||
"R29","22.23","13.97","Bottom",270
|
||||
"R30","6.35","9.53","Bottom",90
|
||||
"R31","24.77","13.97","Bottom",270
|
||||
"R32","5.08","9.53","Bottom",90
|
||||
"R33","3.81","46.36","Bottom",180
|
||||
"R34","3.81","47.63","Bottom",180
|
||||
"R35","13.97","46.99","Bottom",0
|
||||
"R36","13.97","48.26","Bottom",0
|
||||
"R37","3.81","24.77","Bottom",180
|
||||
"R38","3.81","26.04","Bottom",180
|
||||
"R39","13.97","25.40","Bottom",0
|
||||
"R40","13.97","26.67","Bottom",0
|
||||
"R41","3.81","45.09","Bottom",180
|
||||
"R42","13.97","45.72","Bottom",0
|
||||
"R43","3.81","23.50","Bottom",180
|
||||
"R44","13.97","24.13","Bottom",0
|
||||
"R45","41.91","55.88","Bottom",0
|
||||
"R46","31.75","55.25","Bottom",180
|
||||
"R47","31.75","53.98","Bottom",180
|
||||
"R48","40.64","34.29","Bottom",0
|
||||
"R49","30.48","33.66","Bottom",180
|
||||
"R50","30.48","31.12","Bottom",180
|
||||
"R51","41.91","53.34","Bottom",0
|
||||
"R52","40.64","33.02","Bottom",0
|
||||
"R53","41.91","54.61","Bottom",0
|
||||
"R54","31.75","52.71","Bottom",180
|
||||
"R55","40.64","31.75","Bottom",0
|
||||
"R56","30.48","32.38","Bottom",180
|
||||
"R57","41.91","57.15","Bottom",0
|
||||
"R58","40.64","35.56","Bottom",0
|
||||
"R59","31.75","56.52","Bottom",180
|
||||
"R60","30.48","34.93","Bottom",180
|
||||
"R61","23.50","13.97","Bottom",270
|
||||
"R62","26.04","13.97","Bottom",270
|
||||
"R63","3.81","9.53","Bottom",90
|
||||
"R64","2.54","9.53","Bottom",90
|
||||
"R65","22.23","90.17","Bottom",270
|
||||
"R66","20.96","90.17","Bottom",270
|
||||
"R67","22.23","68.58","Bottom",270
|
||||
"R68","20.96","68.58","Bottom",270
|
||||
"R69","22.23","46.99","Bottom",270
|
||||
"R70","20.96","46.99","Bottom",270
|
||||
"R71","22.23","25.40","Bottom",270
|
||||
"R72","20.96","25.40","Bottom",270
|
||||
"R73","19.69","90.17","Bottom",90
|
||||
"R74","19.69","68.58","Bottom",90
|
||||
"R75","19.69","46.99","Bottom",90
|
||||
"R76","19.69","25.40","Bottom",90
|
||||
"R77","1.27","82.55","Bottom",90
|
||||
"R78","1.27","60.96","Bottom",90
|
||||
"R79","1.27","39.37","Bottom",90
|
||||
"R80","1.27","17.78","Bottom",90
|
||||
"R81","2.54","82.55","Bottom",270
|
||||
"R82","2.54","60.96","Bottom",270
|
||||
"R83","2.54","39.37","Bottom",270
|
||||
"R84","2.54","17.78","Bottom",270
|
||||
"R85","58.42","31.12","Bottom",180
|
||||
"R86","27.30","13.97","Bottom",270
|
||||
"R87","7.62","9.53","Bottom",90
|
||||
"R88","17.78","13.34","Bottom",180
|
||||
"R89","7.62","12.07","Bottom",180
|
||||
"R90","20.32","6.35","Bottom",180
|
||||
"U1","60.96","96.52","Bottom",270
|
||||
"U2","60.96","76.20","Bottom",270
|
||||
"U3","8.89","90.17","Bottom",90
|
||||
"U4","8.89","68.58","Bottom",90
|
||||
"U5","50.16","86.36","Bottom",270
|
||||
"U6","50.16","72.39","Bottom",270
|
||||
"U7","39.37","96.52","Bottom",270
|
||||
"U8","36.83","76.20","Bottom",270
|
||||
"U9","62.23","54.61","Bottom",270
|
||||
"U10","64.77","33.02","Bottom",270
|
||||
"U11","8.89","46.99","Bottom",90
|
||||
"U12","8.89","25.40","Bottom",90
|
||||
"U13","50.16","45.09","Bottom",270
|
||||
"U14","50.16","13.97","Bottom",270
|
||||
"U15","36.83","54.61","Bottom",270
|
||||
"U16","35.56","33.02","Bottom",270
|
||||
"U17","20.32","85.09","Bottom",0
|
||||
"U18","20.32","63.50","Bottom",0
|
||||
"U19","20.32","41.91","Bottom",0
|
||||
"U20","20.32","20.32","Bottom",0
|
||||
"U21","50.16","33.02","Bottom",180
|
||||
"U22","12.70","12.70","Bottom",270
|
||||
"X1","50.16","24.13","Bottom",0
|
||||
|
55
stereo_mix_old/hardware_design/pcb/simulation/Draft1.asc
Normal file
55
stereo_mix_old/hardware_design/pcb/simulation/Draft1.asc
Normal file
|
|
@ -0,0 +1,55 @@
|
|||
Version 4
|
||||
SHEET 1 880 680
|
||||
WIRE 288 32 192 32
|
||||
WIRE 192 128 192 32
|
||||
WIRE 208 128 192 128
|
||||
WIRE 288 144 288 32
|
||||
WIRE 288 144 272 144
|
||||
WIRE 176 160 112 160
|
||||
WIRE 208 160 176 160
|
||||
WIRE 176 224 176 160
|
||||
WIRE 224 224 176 224
|
||||
WIRE 304 288 304 224
|
||||
WIRE 304 288 272 288
|
||||
WIRE 112 304 112 160
|
||||
FLAG -80 128 0
|
||||
FLAG 16 128 0
|
||||
FLAG -48 272 0
|
||||
FLAG -80 48 12V
|
||||
FLAG 16 48 -12V
|
||||
FLAG -48 192 3V3
|
||||
FLAG 272 368 0
|
||||
FLAG 112 384 0
|
||||
FLAG 240 176 0
|
||||
FLAG 240 112 3V3
|
||||
SYMBOL voltage -80 32 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V1
|
||||
SYMATTR Value 12
|
||||
SYMBOL voltage 16 32 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V2
|
||||
SYMATTR Value -12
|
||||
SYMBOL voltage -48 176 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V3
|
||||
SYMATTR Value 3.3
|
||||
SYMBOL Opamps\\UniversalOpamp2 240 144 R0
|
||||
SYMATTR InstName U1
|
||||
SYMBOL voltage 272 272 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V5
|
||||
SYMATTR Value SINE(4 5 20)
|
||||
SYMBOL res 96 288 R0
|
||||
SYMATTR InstName R1
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 320 208 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R3
|
||||
SYMATTR Value 200k
|
||||
TEXT -112 296 Left 2 !.tran 2
|
||||
126
stereo_mix_old/hardware_design/pcb/simulation/Draft2.asc
Normal file
126
stereo_mix_old/hardware_design/pcb/simulation/Draft2.asc
Normal file
|
|
@ -0,0 +1,126 @@
|
|||
Version 4
|
||||
SHEET 1 880 680
|
||||
WIRE 32 -192 16 -192
|
||||
WIRE 160 -176 160 -208
|
||||
WIRE 160 -176 80 -176
|
||||
WIRE 160 -160 160 -176
|
||||
WIRE 320 -160 256 -160
|
||||
WIRE -48 -112 -48 -192
|
||||
WIRE -48 -112 -64 -112
|
||||
WIRE 32 -112 32 -192
|
||||
WIRE 96 -112 32 -112
|
||||
WIRE 320 -112 320 -160
|
||||
WIRE 368 -112 320 -112
|
||||
WIRE 368 -96 368 -112
|
||||
WIRE 240 -64 160 -64
|
||||
WIRE 256 -64 240 -64
|
||||
WIRE 240 -16 240 -64
|
||||
WIRE 304 -16 240 -16
|
||||
WIRE 608 -16 576 -16
|
||||
WIRE -64 16 -64 -112
|
||||
WIRE -48 16 -64 16
|
||||
WIRE 304 16 304 -16
|
||||
WIRE 32 32 32 -112
|
||||
WIRE 32 32 16 32
|
||||
WIRE 288 32 208 32
|
||||
WIRE -48 48 -64 48
|
||||
WIRE -64 64 -64 48
|
||||
WIRE 80 80 80 -176
|
||||
WIRE 144 80 144 32
|
||||
WIRE 144 80 80 80
|
||||
WIRE 208 80 144 80
|
||||
WIRE 288 96 288 32
|
||||
WIRE 288 96 272 96
|
||||
WIRE 304 96 288 96
|
||||
WIRE 464 96 304 96
|
||||
WIRE 576 96 576 -16
|
||||
WIRE 576 96 544 96
|
||||
WIRE 592 96 576 96
|
||||
WIRE 208 112 192 112
|
||||
WIRE 688 112 688 -16
|
||||
WIRE 688 112 656 112
|
||||
WIRE 704 112 688 112
|
||||
WIRE 192 128 192 112
|
||||
WIRE 592 128 560 128
|
||||
WIRE 560 144 560 128
|
||||
WIRE -144 176 -144 16
|
||||
FLAG -16 0 +12V
|
||||
FLAG -16 64 -12V
|
||||
FLAG -64 64 0
|
||||
FLAG 240 64 +12V
|
||||
FLAG 240 128 -12V
|
||||
FLAG -256 144 0
|
||||
FLAG -256 64 +12V
|
||||
FLAG -368 64 -12V
|
||||
FLAG -368 144 0
|
||||
FLAG -144 256 0
|
||||
FLAG 368 -96 0
|
||||
FLAG 160 -288 +12V
|
||||
FLAG 192 128 0
|
||||
FLAG 560 144 0
|
||||
FLAG 624 144 -12V
|
||||
FLAG 624 80 +12V
|
||||
SYMBOL TL072 -16 -32 R0
|
||||
SYMATTR InstName U1
|
||||
SYMBOL TL072 240 32 R0
|
||||
SYMATTR InstName U2
|
||||
SYMBOL voltage -256 48 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V1
|
||||
SYMATTR Value 12
|
||||
SYMBOL voltage -368 48 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V2
|
||||
SYMATTR Value -12
|
||||
SYMBOL voltage -144 160 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V3
|
||||
SYMATTR Value PULSE(0 10 0 .25 .25 0 .5)
|
||||
SYMBOL npn 96 -160 R0
|
||||
SYMATTR InstName Q1
|
||||
SYMATTR Value BC847C
|
||||
SYMBOL npn 320 -160 M0
|
||||
SYMATTR InstName Q2
|
||||
SYMATTR Value BC847C
|
||||
SYMBOL res 144 -304 R0
|
||||
SYMATTR InstName R1
|
||||
SYMATTR Value 10Meg
|
||||
SYMBOL res 48 -128 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R2
|
||||
SYMATTR Value 1k
|
||||
SYMBOL res 288 0 R0
|
||||
SYMATTR InstName R3
|
||||
SYMATTR Value 1k5
|
||||
SYMBOL cap 208 16 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C1
|
||||
SYMATTR Value 100p
|
||||
SYMBOL cap 16 -208 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C2
|
||||
SYMATTR Value 100p
|
||||
SYMBOL res -48 0 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R4
|
||||
SYMATTR Value 100k
|
||||
SYMBOL TL072 624 48 R0
|
||||
SYMATTR InstName U3
|
||||
SYMBOL res 704 -32 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R5
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 560 80 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R6
|
||||
SYMATTR Value 10k
|
||||
TEXT -402 280 Left 2 !.tran 1s
|
||||
100
stereo_mix_old/hardware_design/pcb/simulation/Draft3.asc
Normal file
100
stereo_mix_old/hardware_design/pcb/simulation/Draft3.asc
Normal file
|
|
@ -0,0 +1,100 @@
|
|||
Version 4
|
||||
SHEET 1 880 680
|
||||
WIRE 96 -240 -48 -240
|
||||
WIRE -48 -224 -48 -240
|
||||
WIRE -112 -176 -240 -176
|
||||
WIRE 256 -48 240 -48
|
||||
WIRE 336 -48 320 -48
|
||||
WIRE 240 -16 240 -48
|
||||
WIRE -112 0 -112 -176
|
||||
WIRE 48 0 -112 0
|
||||
WIRE 96 16 96 -240
|
||||
WIRE 160 16 96 16
|
||||
WIRE 48 32 48 0
|
||||
WIRE 128 32 48 32
|
||||
WIRE 240 32 240 -16
|
||||
WIRE 256 32 240 32
|
||||
WIRE 336 32 336 -48
|
||||
WIRE 160 64 160 16
|
||||
WIRE 240 64 240 32
|
||||
WIRE 128 128 128 32
|
||||
WIRE 160 128 128 128
|
||||
WIRE 160 144 160 128
|
||||
WIRE 240 144 240 64
|
||||
WIRE 256 144 240 144
|
||||
WIRE 336 160 336 32
|
||||
WIRE 336 160 320 160
|
||||
WIRE 256 176 240 176
|
||||
WIRE 240 192 240 176
|
||||
FLAG -16 272 0
|
||||
FLAG 80 272 0
|
||||
FLAG 80 144 0
|
||||
FLAG -16 144 0
|
||||
FLAG -16 64 +12V
|
||||
FLAG 80 64 -12V
|
||||
FLAG -16 192 -10V
|
||||
FLAG 80 192 +3V3
|
||||
FLAG 288 192 0
|
||||
FLAG 288 128 +3V3
|
||||
FLAG 240 192 0
|
||||
FLAG 160 -16 -10V
|
||||
FLAG -48 -144 0
|
||||
FLAG -240 -96 0
|
||||
SYMBOL voltage -16 48 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V1
|
||||
SYMATTR Value 12
|
||||
SYMBOL voltage 80 48 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V2
|
||||
SYMATTR Value -12
|
||||
SYMBOL voltage -16 176 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V3
|
||||
SYMATTR Value -10
|
||||
SYMBOL voltage 80 176 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V4
|
||||
SYMATTR Value 3.3
|
||||
SYMBOL res 352 16 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R1
|
||||
SYMATTR Value 33k
|
||||
SYMBOL res 256 48 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R2
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 256 128 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R3
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 256 -32 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R4
|
||||
SYMATTR Value 200k
|
||||
SYMBOL voltage -48 -240 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V5
|
||||
SYMATTR Value SINE(0 2.5 10)
|
||||
SYMBOL voltage -240 -192 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V6
|
||||
SYMATTR Value SINE(0 2.5 10000)
|
||||
SYMBOL Opamps\\LT1677 288 96 R0
|
||||
SYMATTR InstName U2
|
||||
SYMBOL cap 320 -64 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C1
|
||||
SYMATTR Value 4.7n
|
||||
TEXT -274 296 Left 2 !.tran 2
|
||||
42
stereo_mix_old/hardware_design/pcb/simulation/Draft4.log
Normal file
42
stereo_mix_old/hardware_design/pcb/simulation/Draft4.log
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
Circuit: * Z:\home\jhbruhn\eurorack\eurorack-dev-environment\eurorack-modules\stereo_mix\hardware_design\pcb\simulation\Draft4.asc
|
||||
|
||||
Instance "m:u1:6": Length shorter than recommended for a level 2 MOSFET.
|
||||
Instance "m:u1:5": Length shorter than recommended for a level 2 MOSFET.
|
||||
Direct Newton iteration failed to find .op point. (Use ".option noopiter" to skip.)
|
||||
Starting Gmin stepping
|
||||
Gmin = 10
|
||||
Gmin = 1.07374
|
||||
Gmin = 0.115292
|
||||
Gmin = 0.0123794
|
||||
Gmin = 0.00132923
|
||||
Gmin = 0.000142725
|
||||
Gmin = 1.5325e-005
|
||||
Gmin = 1.6455e-006
|
||||
Gmin = 1.76685e-007
|
||||
Gmin = 1.89714e-008
|
||||
Gmin = 2.03704e-009
|
||||
Gmin = 2.18725e-010
|
||||
Gmin = 2.34854e-011
|
||||
Gmin = 2.52173e-012
|
||||
Gmin = 2.70769e-013
|
||||
Gmin = 0
|
||||
Gmin stepping succeeded in finding the operating point.
|
||||
|
||||
|
||||
Date: Sat Mar 14 19:22:02 2020
|
||||
Total elapsed time: 0.109 seconds.
|
||||
|
||||
tnom = 27
|
||||
temp = 27
|
||||
method = modified trap
|
||||
totiter = 2512
|
||||
traniter = 2090
|
||||
tranpoints = 1046
|
||||
accept = 1046
|
||||
rejected = 0
|
||||
matrix size = 43
|
||||
fillins = 28
|
||||
solver = Normal
|
||||
Matrix Compiler1: 3.38 KB object code size 0.9/0.4/[0.2]
|
||||
Matrix Compiler2: 4.15 KB object code size 0.5/0.6/[0.3]
|
||||
|
||||
BIN
stereo_mix_old/hardware_design/pcb/simulation/Draft4.op.raw
Normal file
BIN
stereo_mix_old/hardware_design/pcb/simulation/Draft4.op.raw
Normal file
Binary file not shown.
BIN
stereo_mix_old/hardware_design/pcb/simulation/Draft4.raw
Normal file
BIN
stereo_mix_old/hardware_design/pcb/simulation/Draft4.raw
Normal file
Binary file not shown.
75
stereo_mix_old/hardware_design/pcb/simulation/LM13700.asy
Normal file
75
stereo_mix_old/hardware_design/pcb/simulation/LM13700.asy
Normal file
|
|
@ -0,0 +1,75 @@
|
|||
Version 4
|
||||
SymbolType CELL
|
||||
LINE Normal -16 64 -48 64
|
||||
LINE Normal -32 40 -16 64
|
||||
LINE Normal -48 64 -32 40
|
||||
LINE Normal -16 40 -48 40
|
||||
LINE Normal -16 96 -48 96
|
||||
LINE Normal -32 120 -16 96
|
||||
LINE Normal -48 96 -32 120
|
||||
LINE Normal -16 120 -48 120
|
||||
LINE Normal -32 1 -32 161
|
||||
LINE Normal 96 80 -32 1
|
||||
LINE Normal -32 161 96 80
|
||||
LINE Normal 32 17 32 41
|
||||
LINE Normal 32 145 32 121
|
||||
LINE Normal 41 56 34 56
|
||||
LINE Normal 37 60 37 52
|
||||
LINE Normal 40 107 32 107
|
||||
LINE Normal 224 97 224 64
|
||||
LINE Normal 240 64 224 76
|
||||
LINE Normal 224 85 240 96
|
||||
LINE Normal 212 81 224 81
|
||||
LINE Normal 237 90 240 96
|
||||
LINE Normal 233 96 237 90
|
||||
LINE Normal 240 96 233 96
|
||||
LINE Normal 252 112 252 79
|
||||
LINE Normal 268 79 252 91
|
||||
LINE Normal 252 100 268 111
|
||||
LINE Normal 240 96 252 96
|
||||
LINE Normal 265 105 268 111
|
||||
LINE Normal 261 111 265 105
|
||||
LINE Normal 268 111 261 111
|
||||
LINE Normal 268 64 268 79
|
||||
LINE Normal 240 64 268 64
|
||||
LINE Normal -16 25 -24 25
|
||||
LINE Normal -12 136 -23 136
|
||||
LINE Normal -17 142 -17 132
|
||||
LINE Normal -32 16 -64 16
|
||||
LINE Normal -32 80 -64 80
|
||||
LINE Normal -32 144 -64 144
|
||||
LINE Normal 129 73 129 51
|
||||
CIRCLE Normal 130 64 97 96
|
||||
CIRCLE Normal 160 65 127 97
|
||||
WINDOW 0 83 -7 Left 2
|
||||
WINDOW 3 75 138 Left 2
|
||||
SYMATTR Value LM13700
|
||||
SYMATTR Prefix X
|
||||
SYMATTR Value2 HALF13700
|
||||
SYMATTR Description Operational transconductance amplifier
|
||||
PIN -64 80 NONE 8
|
||||
PINATTR PinName LIN
|
||||
PINATTR SpiceOrder 1
|
||||
PIN -64 144 NONE 8
|
||||
PINATTR PinName INP
|
||||
PINATTR SpiceOrder 2
|
||||
PIN -64 16 NONE 8
|
||||
PINATTR PinName INN
|
||||
PINATTR SpiceOrder 3
|
||||
PIN 128 48 NONE 8
|
||||
PINATTR PinName IAB
|
||||
PINATTR SpiceOrder 4
|
||||
PIN 160 80 NONE 8
|
||||
PINATTR SpiceOrder 5
|
||||
PIN 32 16 NONE 8
|
||||
PINATTR PinName VCC
|
||||
PINATTR SpiceOrder 6
|
||||
PIN 32 144 NONE 8
|
||||
PINATTR PinName VSS
|
||||
PINATTR SpiceOrder 7
|
||||
PIN 208 80 NONE 8
|
||||
PINATTR PinName BIN
|
||||
PINATTR SpiceOrder 8
|
||||
PIN 272 112 NONE 8
|
||||
PINATTR PinName BUF
|
||||
PINATTR SpiceOrder 9
|
||||
165
stereo_mix_old/hardware_design/pcb/simulation/MCP6001.lib
Normal file
165
stereo_mix_old/hardware_design/pcb/simulation/MCP6001.lib
Normal file
|
|
@ -0,0 +1,165 @@
|
|||
.SUBCKT MCP6001 1 2 3 4 5
|
||||
* | | | | |
|
||||
* | | | | Output
|
||||
* | | | Negative Supply
|
||||
* | | Positive Supply
|
||||
* | Inverting Input
|
||||
* Non-inverting Input
|
||||
*
|
||||
********************************************************************************
|
||||
* Software License Agreement *
|
||||
* *
|
||||
* The software supplied herewith by Microchip Technology Incorporated (the *
|
||||
* "Company") is intended and supplied to you, the Company's customer, for use *
|
||||
* soley and exclusively on Microchip products. *
|
||||
* *
|
||||
* The software is owned by the Company and/or its supplier, and is protected *
|
||||
* under applicable copyright laws. All rights are reserved. Any use in *
|
||||
* violation of the foregoing restrictions may subject the user to criminal *
|
||||
* sanctions under applicable laws, as well as to civil liability for the *
|
||||
* breach of the terms and conditions of this license. *
|
||||
* *
|
||||
* THIS SOFTWARE IS PROVIDED IN AN "AS IS" CONDITION. NO WARRANTIES, WHETHER *
|
||||
* EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED *
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO *
|
||||
* THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR *
|
||||
* SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. *
|
||||
********************************************************************************
|
||||
*
|
||||
* Macromodel for the MCP6001/2/4 op amp family:
|
||||
* MCP6001, MCP6001R, MCP6001U, MCP6002, MCP6004
|
||||
*
|
||||
* Revision History:
|
||||
* REV A: 21-Jun-02, Created model
|
||||
* REV B: 16-Jul-02, Improved output stage
|
||||
* REV C: 03-Jan-03, Added MCP6001
|
||||
* REV D: 19-Aug-06, Added over temperature, improved output stage,
|
||||
* fixed overdrive recovery time
|
||||
* REV E: 27-Jul-07, Updated output impedance for better model stability w/cap load
|
||||
* REV F: 09-Jul-12, Added MCP6001R, MCP6001U
|
||||
*
|
||||
* Recommendations:
|
||||
* Use PSPICE (other simulators may require translation)
|
||||
* For a quick, effective design, use a combination of: data sheet
|
||||
* specs, bench testing, and simulations with this macromodel
|
||||
* For high impedance circuits, set GMIN=100F in .OPTIONS
|
||||
*
|
||||
* Supported:
|
||||
* Typical performance for temperature range (-40 to 125) degrees Celsius
|
||||
* DC, AC, Transient, and Noise analyses.
|
||||
* Most specs, including: offsets, DC PSRR, DC CMRR, input impedance,
|
||||
* open loop gain, voltage ranges, supply current, ... , etc.
|
||||
* Temperature effects for Ibias, Iquiescent, Iout short circuit
|
||||
* current, Vsat on both rails, Slew Rate vs. Temp and P.S.
|
||||
*
|
||||
* Not Supported:
|
||||
* Some Variation in specs vs. Power Supply Voltage
|
||||
* Monte Carlo (Vos, Ib), Process variation
|
||||
* Distortion (detailed non-linear behavior)
|
||||
* Behavior outside normal operating region
|
||||
*
|
||||
* Input Stage
|
||||
V10 3 10 -500M
|
||||
R10 10 11 6.90K
|
||||
R11 10 12 6.90K
|
||||
C11 11 12 0.2p
|
||||
C12 1 0 6.00P
|
||||
E12 71 14 POLY(4) 20 0 21 0 26 0 27 0 1.00M 20.1 20.1 1 1
|
||||
G12 1 0 62 0 1m
|
||||
M12 11 14 15 15 NMI L=2.00U W=42.0U
|
||||
M14 12 2 15 15 NMI L=2.00U W=42.0U
|
||||
G14 2 0 62 0 1m
|
||||
C14 2 0 6.00P
|
||||
I15 15 4 50.0U
|
||||
V16 16 4 -300M
|
||||
GD16 16 1 TABLE {V(16,1)} ((-100,-1p)(0,0)(1m,1n)(2m,1m)(3m,1))
|
||||
V13 3 13 -300M
|
||||
GD13 2 13 TABLE {V(2,13)} ((-100,-1p)(0,0)(1m,1n)(2m,1m)(3m,1))
|
||||
R70 1 0 20.6T
|
||||
R71 2 0 20.6T
|
||||
R72 1 2 20T
|
||||
I80 1 2 0.5p
|
||||
*
|
||||
* Noise, PSRR, and CMRR
|
||||
I20 21 20 423U
|
||||
D20 20 0 DN1
|
||||
D21 0 21 DN1
|
||||
G26 0 26 POLY(1) 3 4 110U -49U
|
||||
R26 26 0 1
|
||||
G27 0 27 POLY(2) 1 0 2 0 -440U 39.7U 39.7U
|
||||
R27 27 0 1
|
||||
*
|
||||
* Open Loop Gain, Slew Rate
|
||||
G30 0 30 POLY(1) 12 11 0 1
|
||||
R30 30 0 1K
|
||||
G31 0 31 POLY(1) 3 4 86 5.25
|
||||
R31 31 0 1 TC=2.8m
|
||||
GD31 30 31 TABLE {V(30,31)} ((-11,-1)(-10,-10n)(0,0)(1m,1000))
|
||||
G32 32 0 POLY(1) 3 4 113.7 3.5
|
||||
R32 32 0 1 TC=2.65m
|
||||
GD32 30 32 TABLE {V(30,32)} ((-1m,-1000)(0,0)(10,10n)(11,1))
|
||||
G33 0 33 30 0 1m
|
||||
R33 33 0 1k
|
||||
G34 0 34 33 0 425M
|
||||
R34 34 0 1K
|
||||
C34 34 0 74U
|
||||
G37 0 37 34 0 1m
|
||||
R37 37 0 1K
|
||||
C37 37 0 41.6P
|
||||
G38 0 38 37 0 1m
|
||||
R38 39 0 1K
|
||||
L38 38 39 100U
|
||||
E38 35 0 38 0 1
|
||||
G35 33 0 TABLE {V(35,3)} ((-1,-1n)(0,0)(16,1n))(16.1,1))
|
||||
G36 33 0 TABLE {V(35,4)} ((-16.1,-1)((-16,-1n)(0,0)(1,1n))
|
||||
*
|
||||
* Output Stage
|
||||
R80 50 0 100MEG
|
||||
G50 0 50 57 96 2
|
||||
R58 57 96 0.50
|
||||
R57 57 0 750
|
||||
C58 5 0 2.00P
|
||||
G57 0 57 POLY(3) 3 0 4 0 35 0 0 0.67M 0.67M 1.5M
|
||||
GD55 55 57 TABLE {V(55,57)} ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
|
||||
GD56 57 56 TABLE {V(57,56)} ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
|
||||
E55 55 0 POLY(2) 3 0 51 0 -0.7m 1 -40.0M
|
||||
E56 56 0 POLY(2) 4 0 52 0 1.2m 1 -37.0M
|
||||
R51 51 0 1k
|
||||
R52 52 0 1k
|
||||
GD51 50 51 TABLE {V(50,51)} ((-10,-1n)(0,0)(1m,1m)(2m,1))
|
||||
GD52 50 52 TABLE {V(50,52)} ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
|
||||
G53 3 0 POLY(1) 51 0 -49U 1M
|
||||
G54 0 4 POLY(1) 52 0 -49U -1M
|
||||
*
|
||||
* Current Limit
|
||||
G99 96 5 99 0 1
|
||||
R98 0 98 1 TC=-2.8M,2.63U
|
||||
G97 0 98 TABLE { V(96,5) } ((-11.0,-10.0M)(-1.00M,-9.9M)(0,0)(1.00M,9.9M)(11.0,10.0M))
|
||||
E97 99 0 VALUE { V(98)*((V(3)-V(4))*359M + 310M)}
|
||||
D98 4 5 DESD
|
||||
D99 5 3 DESD
|
||||
*
|
||||
* Temperature / Voltage Sensitive IQuiscent
|
||||
R61 0 61 100 TC 3.11M 4.51U
|
||||
G61 3 4 61 0 1
|
||||
G60 0 61 TABLE {V(3, 4)}
|
||||
+ ((0,0)(900M,0.0106U)(1.00,0.20U)(1.3,0.63U)
|
||||
+ (1.5,0.66U)(1.6,1.06U)(5.5,1.10U))
|
||||
*
|
||||
* Temp Sensitive offset voltage
|
||||
I73 0 70 DC 1uA
|
||||
R74 0 70 1 TC=2
|
||||
E75 1 71 70 0 1
|
||||
*
|
||||
* Temp Sensistive IBias
|
||||
I62 0 62 DC 1uA
|
||||
R62 0 62 REXP 58.2u
|
||||
* Voltage on R62 used for G12, G14 in input stage
|
||||
*
|
||||
* Models
|
||||
.MODEL NMI NMOS
|
||||
.MODEL DESD D N=1 IS=1.00E-15
|
||||
.MODEL DL D N=1 IS=1F
|
||||
.MODEL DN1 D IS=1P KF=146E-18 AF=1
|
||||
.MODEL REXP RES TCE=10.1
|
||||
.ENDS MCP6001
|
||||
35
stereo_mix_old/hardware_design/pcb/simulation/TL072.asy
Normal file
35
stereo_mix_old/hardware_design/pcb/simulation/TL072.asy
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
Version 4
|
||||
SymbolType CELL
|
||||
LINE Normal -32 32 32 64
|
||||
LINE Normal -32 96 32 64
|
||||
LINE Normal -32 32 -32 96
|
||||
LINE Normal -28 48 -20 48
|
||||
LINE Normal -28 80 -20 80
|
||||
LINE Normal -24 84 -24 76
|
||||
LINE Normal 0 32 0 48
|
||||
LINE Normal 0 96 0 80
|
||||
LINE Normal 4 44 12 44
|
||||
LINE Normal 8 40 8 48
|
||||
LINE Normal 4 84 12 84
|
||||
WINDOW 0 16 32 Left 0
|
||||
WINDOW 3 16 96 Left 0
|
||||
SYMATTR Value TL072
|
||||
SYMATTR Prefix X
|
||||
SYMATTR SpiceModel TL072.sub
|
||||
SYMATTR Value2 TL072
|
||||
SYMATTR Description TL072 LOW NOISE DUAL JFET OPAMP
|
||||
PIN -32 80 NONE 0
|
||||
PINATTR PinName In+
|
||||
PINATTR SpiceOrder 1
|
||||
PIN -32 48 NONE 0
|
||||
PINATTR PinName In-
|
||||
PINATTR SpiceOrder 2
|
||||
PIN 0 32 NONE 0
|
||||
PINATTR PinName V+
|
||||
PINATTR SpiceOrder 3
|
||||
PIN 0 96 NONE 0
|
||||
PINATTR PinName V-
|
||||
PINATTR SpiceOrder 4
|
||||
PIN 32 64 NONE 0
|
||||
PINATTR PinName OUT
|
||||
PINATTR SpiceOrder 5
|
||||
42
stereo_mix_old/hardware_design/pcb/simulation/TL072.sub
Normal file
42
stereo_mix_old/hardware_design/pcb/simulation/TL072.sub
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
* TL072 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
|
||||
* CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08
|
||||
* (REV N/A) SUPPLY VOLTAGE: +/-15V
|
||||
* CONNECTIONS: NON-INVERTING INPUT
|
||||
* | INVERTING INPUT
|
||||
* | | POSITIVE POWER SUPPLY
|
||||
* | | | NEGATIVE POWER SUPPLY
|
||||
* | | | | OUTPUT
|
||||
* | | | | |
|
||||
.SUBCKT TL072 1 2 3 4 5
|
||||
*
|
||||
C1 11 12 3.498E-12
|
||||
C2 6 7 15.00E-12
|
||||
DC 5 53 DX
|
||||
DE 54 5 DX
|
||||
DLP 90 91 DX
|
||||
DLN 92 90 DX
|
||||
DP 4 3 DX
|
||||
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
|
||||
FB 7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6
|
||||
GA 6 0 11 12 282.8E-6
|
||||
GCM 0 6 10 99 8.942E-9
|
||||
ISS 3 10 DC 195.0E-6
|
||||
HLIM 90 0 VLIM 1K
|
||||
J1 11 2 10 JX
|
||||
J2 12 1 10 JX
|
||||
R2 6 9 100.0E3
|
||||
RD1 4 11 3.536E3
|
||||
RD2 4 12 3.536E3
|
||||
RO1 8 5 150
|
||||
RO2 7 99 150
|
||||
RP 3 4 2.143E3
|
||||
RSS 10 99 1.026E6
|
||||
VB 9 0 DC 0
|
||||
VC 3 53 DC 2.200
|
||||
VE 54 4 DC 2.200
|
||||
VLIM 7 8 DC 0
|
||||
VLP 91 0 DC 25
|
||||
VLN 0 92 DC 25
|
||||
.MODEL DX D(IS=800.0E-18)
|
||||
.MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1)
|
||||
.ENDS
|
||||
152
stereo_mix_old/hardware_design/pcb/simulation/digital_tests.asc
Normal file
152
stereo_mix_old/hardware_design/pcb/simulation/digital_tests.asc
Normal file
|
|
@ -0,0 +1,152 @@
|
|||
Version 4
|
||||
SHEET 1 1208 680
|
||||
WIRE 304 32 272 32
|
||||
WIRE 624 32 608 32
|
||||
WIRE 96 144 80 144
|
||||
WIRE 176 144 176 64
|
||||
WIRE 192 144 192 32
|
||||
WIRE 192 144 176 144
|
||||
WIRE 208 144 192 144
|
||||
WIRE 384 144 384 32
|
||||
WIRE 384 144 368 144
|
||||
WIRE 400 144 384 144
|
||||
WIRE 528 144 528 32
|
||||
WIRE 528 144 480 144
|
||||
WIRE 544 144 528 144
|
||||
WIRE 304 160 304 32
|
||||
WIRE 304 160 272 160
|
||||
WIRE 624 160 624 32
|
||||
WIRE 624 160 608 160
|
||||
WIRE 208 176 192 176
|
||||
WIRE 544 176 528 176
|
||||
WIRE 80 192 80 144
|
||||
WIRE 192 192 192 176
|
||||
WIRE 368 256 368 144
|
||||
WIRE 528 304 528 176
|
||||
WIRE 576 304 528 304
|
||||
WIRE 320 352 240 352
|
||||
WIRE 240 416 240 352
|
||||
WIRE 256 416 240 416
|
||||
WIRE 320 432 320 352
|
||||
WIRE 400 432 320 432
|
||||
WIRE 256 448 224 448
|
||||
WIRE 112 496 112 480
|
||||
WIRE 224 496 224 448
|
||||
WIRE 224 496 112 496
|
||||
WIRE 112 512 112 496
|
||||
WIRE 480 528 480 432
|
||||
WIRE 464 608 480 528
|
||||
WIRE 576 608 576 304
|
||||
WIRE 576 608 464 608
|
||||
FLAG -192 208 0
|
||||
FLAG -192 352 0
|
||||
FLAG -80 352 0
|
||||
FLAG -192 128 +3V3
|
||||
FLAG 240 128 +3V3
|
||||
FLAG -192 272 -12V
|
||||
FLAG -80 272 +12V
|
||||
FLAG 240 192 0
|
||||
FLAG 80 272 0
|
||||
FLAG -80 208 0
|
||||
FLAG -80 128 -10V
|
||||
FLAG 96 64 -10V
|
||||
FLAG 192 192 0
|
||||
FLAG 576 192 -12V
|
||||
FLAG 576 128 +12V
|
||||
FLAG 368 336 0
|
||||
FLAG 112 592 0
|
||||
FLAG -352 128 +2V048
|
||||
FLAG -352 208 0
|
||||
FLAG 112 400 +2V048
|
||||
FLAG 656 304 0
|
||||
FLAG 288 464 -12V
|
||||
FLAG 288 400 +12V
|
||||
SYMBOL voltage -80 256 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V1
|
||||
SYMATTR Value 12
|
||||
SYMBOL voltage -192 256 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V2
|
||||
SYMATTR Value -12
|
||||
SYMBOL voltage -192 112 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V3
|
||||
SYMATTR Value 3.3
|
||||
SYMBOL voltage 80 176 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V4
|
||||
SYMATTR Value SINE(0 10 20 0 0 0 0)
|
||||
SYMBOL res 192 128 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R1
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 288 16 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R2
|
||||
SYMATTR Value 15k
|
||||
SYMBOL res 192 48 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R3
|
||||
SYMATTR Value 91k
|
||||
SYMBOL voltage -80 112 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V5
|
||||
SYMATTR Value -10
|
||||
SYMBOL Opamps\\LT1677 240 96 R0
|
||||
SYMATTR InstName U1
|
||||
SYMBOL TL072 576 96 R0
|
||||
SYMATTR InstName U2
|
||||
SYMBOL res 496 128 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R4
|
||||
SYMATTR Value 47k
|
||||
SYMBOL res 624 16 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R5
|
||||
SYMATTR Value 300k
|
||||
SYMBOL res 400 16 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R9
|
||||
SYMATTR Value {X}
|
||||
SYMBOL res 384 352 R180
|
||||
WINDOW 0 36 76 Left 2
|
||||
WINDOW 3 36 40 Left 2
|
||||
SYMATTR InstName R10
|
||||
SYMATTR Value {100k-X}
|
||||
SYMBOL res 96 384 R0
|
||||
SYMATTR InstName R12
|
||||
SYMATTR Value {X}
|
||||
SYMBOL res 96 496 R0
|
||||
SYMATTR InstName R13
|
||||
SYMATTR Value {100k-X}
|
||||
SYMBOL voltage -352 112 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V6
|
||||
SYMATTR Value 2.048
|
||||
SYMBOL res 496 416 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R14
|
||||
SYMATTR Value 47k
|
||||
SYMBOL res 672 288 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R7
|
||||
SYMATTR Value 100k
|
||||
SYMBOL TL072 288 368 R0
|
||||
SYMATTR InstName U3
|
||||
TEXT -96 216 Left 2 !.tran 1
|
||||
TEXT 720 80 Left 2 !.step param X .001k 99.999k 10k
|
||||
39
stereo_mix_old/hardware_design/pcb/simulation/lm13700.sub
Normal file
39
stereo_mix_old/hardware_design/pcb/simulation/lm13700.sub
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
.SUBCKT HALF13700 LIN INP INN IAB OUT VCC VSS BIN BUF
|
||||
QN1 IAB VN2B VSS npnv 3
|
||||
QN2 VN2B VN2B VSS npnv 3
|
||||
QN3 VN3C IAB VN2B npnv 3
|
||||
QN4 VP3B INN VN3C npnv 3
|
||||
QN5 VP6B INP VN3C npnv 3
|
||||
QN6 LIN LIN INN npnv 3
|
||||
QN7 LIN LIN INP npnv 3
|
||||
QN8 VN10B VN9B VSS npnv 3
|
||||
QN9 VN9B VN9B VSS npnv 3
|
||||
QN10 OUT VN10B VN9B npnv 3
|
||||
QN11 VCC BIN VN12B npnv 15
|
||||
QN12 VN12B VN12B BUF npnv 3
|
||||
QN13 VCC VN12B BUF npnv 150
|
||||
QP1 VP3B VP2B VCC pnpl 3
|
||||
QP2 VP2B VP2B VCC pnpl 3
|
||||
QP3 VN10B VP3B VP2B pnpl 3
|
||||
QP4 VP6B VP5B VCC pnpl 3
|
||||
QP5 VP5B VP5B VCC pnpl 3
|
||||
QP6 OUT VP6B VP5B pnpl 3
|
||||
.ends
|
||||
|
||||
.MODEL npnv NPN(
|
||||
*==========================================================
|
||||
+IS=1.1E-18 NF=1.005 BF=220 VAF=130 IKF=5e-03
|
||||
+ISE=9.15E-15 NE=2
|
||||
*==========================================================
|
||||
+CJE=2E-12 CJC=2E-13 CJS=3E-12 TF=.6E-9 )
|
||||
|
||||
.MODEL pnpl PNP(
|
||||
*==========================================================
|
||||
+IS=1.1E-18 NF=1.8 BF=5 VAF=170 IKF=6e-03
|
||||
+ISE=3E-15 NE=3
|
||||
*==========================================================
|
||||
+CJE=4E-12 CJC=6E-13 CJS=5E-12 TF=70E-9 )
|
||||
|
||||
|
||||
|
||||
.end
|
||||
704
stereo_mix_old/hardware_design/pcb/simulation/panner.asc
Normal file
704
stereo_mix_old/hardware_design/pcb/simulation/panner.asc
Normal file
|
|
@ -0,0 +1,704 @@
|
|||
Version 4
|
||||
SHEET 1 1880 1252
|
||||
WIRE 1408 -464 1392 -464
|
||||
WIRE 1392 -384 1392 -464
|
||||
WIRE 1472 -384 1472 -464
|
||||
WIRE 1168 -368 1088 -368
|
||||
WIRE 928 -288 912 -288
|
||||
WIRE 1008 -288 928 -288
|
||||
WIRE 1088 -288 1088 -368
|
||||
WIRE 1152 -288 1088 -288
|
||||
WIRE 1232 -288 1232 -368
|
||||
WIRE 1312 -288 1232 -288
|
||||
WIRE 1312 -272 1312 -288
|
||||
WIRE 1360 -272 1312 -272
|
||||
WIRE 1392 -272 1392 -384
|
||||
WIRE 1472 -256 1472 -384
|
||||
WIRE 1472 -256 1456 -256
|
||||
WIRE 1360 -240 1360 -272
|
||||
WIRE 1376 -240 1360 -240
|
||||
WIRE 1392 -240 1376 -240
|
||||
WIRE 416 -224 416 -336
|
||||
WIRE 448 -224 416 -224
|
||||
WIRE 464 -224 448 -224
|
||||
WIRE 576 -208 576 -336
|
||||
WIRE 576 -208 528 -208
|
||||
WIRE 464 -192 416 -192
|
||||
WIRE 832 -192 768 -192
|
||||
WIRE 416 -176 416 -192
|
||||
WIRE 720 -160 640 -160
|
||||
WIRE 768 -160 768 -192
|
||||
WIRE 432 -144 384 -144
|
||||
WIRE 832 -128 832 -192
|
||||
WIRE 944 -128 928 -128
|
||||
WIRE 1088 -128 1088 -288
|
||||
WIRE 1088 -128 1024 -128
|
||||
WIRE 1120 -128 1088 -128
|
||||
WIRE 1216 -128 1216 -160
|
||||
WIRE 832 -112 832 -128
|
||||
WIRE 928 -112 928 -128
|
||||
WIRE 1360 -112 1312 -112
|
||||
WIRE 1312 -96 1312 -112
|
||||
WIRE 16 -80 0 -80
|
||||
WIRE 112 -80 96 -80
|
||||
WIRE 288 -80 288 -112
|
||||
WIRE 0 -64 0 -80
|
||||
WIRE 752 -64 720 -64
|
||||
WIRE 768 -64 752 -64
|
||||
WIRE 1376 -64 1376 -240
|
||||
WIRE 1376 -64 1344 -64
|
||||
WIRE 384 -48 384 -64
|
||||
WIRE 752 -48 752 -64
|
||||
WIRE 752 -32 752 -48
|
||||
WIRE 448 -16 448 -224
|
||||
WIRE 448 -16 416 -16
|
||||
WIRE 576 0 576 -208
|
||||
WIRE 896 0 576 0
|
||||
WIRE 1072 0 976 0
|
||||
WIRE 1120 0 1072 0
|
||||
WIRE -256 32 -304 32
|
||||
WIRE 912 32 752 32
|
||||
WIRE 1216 32 1216 0
|
||||
WIRE -32 48 -96 48
|
||||
WIRE 144 48 48 48
|
||||
WIRE 192 48 144 48
|
||||
WIRE 1360 64 1360 -112
|
||||
WIRE 1360 64 1344 64
|
||||
WIRE 288 80 288 48
|
||||
WIRE 912 80 912 32
|
||||
WIRE 960 80 912 80
|
||||
WIRE 960 112 960 80
|
||||
WIRE 960 112 880 112
|
||||
WIRE 432 128 432 -144
|
||||
WIRE -256 144 -256 112
|
||||
WIRE -256 144 -368 144
|
||||
WIRE 640 144 640 -160
|
||||
WIRE 816 144 816 112
|
||||
WIRE 816 144 640 144
|
||||
WIRE -256 160 -256 144
|
||||
WIRE 656 160 656 -112
|
||||
WIRE 800 160 656 160
|
||||
WIRE 336 176 304 176
|
||||
WIRE 368 176 336 176
|
||||
WIRE 816 176 816 144
|
||||
WIRE 864 176 816 176
|
||||
WIRE 944 192 928 192
|
||||
WIRE 960 192 960 112
|
||||
WIRE 960 192 944 192
|
||||
WIRE 1344 192 1344 144
|
||||
WIRE 1344 192 1248 192
|
||||
WIRE 800 208 800 160
|
||||
WIRE 800 208 784 208
|
||||
WIRE 864 208 848 208
|
||||
WIRE -368 224 -368 144
|
||||
WIRE -352 224 -368 224
|
||||
WIRE -256 240 -288 240
|
||||
WIRE 80 240 -256 240
|
||||
WIRE 208 240 160 240
|
||||
WIRE 336 240 336 176
|
||||
WIRE 624 240 480 240
|
||||
WIRE 848 240 848 208
|
||||
WIRE -480 256 -720 256
|
||||
WIRE -352 256 -400 256
|
||||
WIRE 304 256 304 176
|
||||
WIRE 304 256 272 256
|
||||
WIRE 624 256 624 240
|
||||
WIRE 720 256 720 208
|
||||
WIRE 720 256 704 256
|
||||
WIRE 800 256 800 208
|
||||
WIRE 1248 256 1248 192
|
||||
WIRE 208 272 192 272
|
||||
WIRE 704 272 704 256
|
||||
WIRE 704 272 656 272
|
||||
WIRE 192 304 192 272
|
||||
WIRE 480 304 480 240
|
||||
WIRE 528 304 480 304
|
||||
WIRE 1120 304 976 304
|
||||
WIRE 1184 304 1120 304
|
||||
WIRE 624 320 624 256
|
||||
WIRE 624 320 592 320
|
||||
WIRE -400 336 -400 256
|
||||
WIRE 528 336 480 336
|
||||
WIRE 656 336 656 272
|
||||
WIRE 704 336 656 336
|
||||
WIRE 160 352 160 240
|
||||
WIRE 336 352 336 304
|
||||
WIRE 336 352 160 352
|
||||
WIRE 432 352 432 224
|
||||
WIRE 432 352 336 352
|
||||
WIRE 800 352 800 256
|
||||
WIRE 800 352 768 352
|
||||
WIRE 704 368 688 368
|
||||
WIRE 976 368 976 304
|
||||
WIRE 1024 368 976 368
|
||||
WIRE 1120 384 1120 304
|
||||
WIRE 1120 384 1088 384
|
||||
WIRE 944 400 944 192
|
||||
WIRE 1024 400 944 400
|
||||
WIRE 1392 400 1344 400
|
||||
WIRE 1504 400 1456 400
|
||||
WIRE 688 416 688 368
|
||||
WIRE -720 432 -720 256
|
||||
WIRE -480 432 -720 432
|
||||
WIRE 480 432 480 336
|
||||
WIRE 480 432 464 432
|
||||
WIRE 528 432 480 432
|
||||
WIRE 1248 480 1248 352
|
||||
WIRE 1248 480 976 480
|
||||
WIRE 1344 480 1344 400
|
||||
WIRE 1504 480 1504 400
|
||||
WIRE 1504 480 1424 480
|
||||
WIRE -720 496 -720 432
|
||||
WIRE 608 512 608 432
|
||||
WIRE 624 512 608 512
|
||||
WIRE 1344 544 1344 480
|
||||
WIRE 1200 560 1168 560
|
||||
WIRE 1344 592 1344 544
|
||||
WIRE 1392 592 1344 592
|
||||
WIRE 944 608 944 400
|
||||
WIRE 944 608 864 608
|
||||
WIRE 1024 608 1024 560
|
||||
WIRE 1056 608 1024 608
|
||||
WIRE 1504 608 1504 480
|
||||
WIRE 1504 608 1456 608
|
||||
WIRE 1392 624 1376 624
|
||||
WIRE 416 640 416 528
|
||||
WIRE 448 640 416 640
|
||||
WIRE 464 640 448 640
|
||||
WIRE 1104 640 1104 560
|
||||
WIRE 1120 640 1104 640
|
||||
WIRE 1200 640 1200 560
|
||||
WIRE 1376 640 1376 624
|
||||
WIRE 1376 640 1200 640
|
||||
WIRE 576 656 576 528
|
||||
WIRE 576 656 528 656
|
||||
WIRE 1056 656 1056 608
|
||||
WIRE 1056 656 1024 656
|
||||
WIRE -352 672 -368 672
|
||||
WIRE -256 672 -272 672
|
||||
WIRE 464 672 416 672
|
||||
WIRE 1360 672 1312 672
|
||||
WIRE 416 688 416 672
|
||||
WIRE 1056 704 1056 656
|
||||
WIRE 432 720 384 720
|
||||
WIRE 944 736 928 736
|
||||
WIRE 1104 736 1104 640
|
||||
WIRE 1104 736 1024 736
|
||||
WIRE 1120 736 1104 736
|
||||
WIRE 1216 736 1216 704
|
||||
WIRE -480 752 -480 432
|
||||
WIRE -384 752 -400 752
|
||||
WIRE 928 752 928 736
|
||||
WIRE 1312 768 1312 752
|
||||
WIRE 16 784 0 784
|
||||
WIRE 112 784 96 784
|
||||
WIRE 288 784 288 752
|
||||
WIRE -384 800 -384 752
|
||||
WIRE -368 800 -368 672
|
||||
WIRE -368 800 -384 800
|
||||
WIRE -352 800 -368 800
|
||||
WIRE 0 800 0 784
|
||||
WIRE 1376 800 1376 640
|
||||
WIRE 1376 800 1344 800
|
||||
WIRE -256 816 -256 672
|
||||
WIRE -256 816 -288 816
|
||||
WIRE -208 816 -256 816
|
||||
WIRE 384 816 384 800
|
||||
WIRE -368 832 -400 832
|
||||
WIRE -352 832 -368 832
|
||||
WIRE 448 848 448 640
|
||||
WIRE 448 848 416 848
|
||||
WIRE 576 864 576 656
|
||||
WIRE 896 864 576 864
|
||||
WIRE 1072 864 976 864
|
||||
WIRE 1120 864 1072 864
|
||||
WIRE -368 880 -368 832
|
||||
WIRE 1216 896 1216 864
|
||||
WIRE -32 912 -96 912
|
||||
WIRE 144 912 48 912
|
||||
WIRE 192 912 144 912
|
||||
WIRE 1360 928 1360 672
|
||||
WIRE 1456 928 1360 928
|
||||
WIRE 288 944 288 912
|
||||
WIRE 1360 944 1360 928
|
||||
WIRE 432 992 432 720
|
||||
WIRE 1296 992 1232 992
|
||||
WIRE 1232 1008 1232 992
|
||||
WIRE 1232 1008 1088 1008
|
||||
WIRE 336 1040 304 1040
|
||||
WIRE 368 1040 336 1040
|
||||
WIRE 864 1040 864 608
|
||||
WIRE 992 1040 864 1040
|
||||
WIRE 1088 1056 1088 1008
|
||||
WIRE 1136 1056 1088 1056
|
||||
WIRE 1232 1072 1232 1008
|
||||
WIRE 1232 1072 1200 1072
|
||||
WIRE 992 1088 992 1040
|
||||
WIRE 1136 1088 992 1088
|
||||
WIRE -208 1104 -208 816
|
||||
WIRE 80 1104 -208 1104
|
||||
WIRE 208 1104 160 1104
|
||||
WIRE 336 1104 336 1040
|
||||
WIRE 304 1120 304 1040
|
||||
WIRE 304 1120 272 1120
|
||||
WIRE 208 1136 192 1136
|
||||
WIRE 192 1168 192 1136
|
||||
WIRE 1360 1168 1360 1040
|
||||
WIRE 160 1216 160 1104
|
||||
WIRE 336 1216 336 1168
|
||||
WIRE 336 1216 160 1216
|
||||
WIRE 432 1216 432 1088
|
||||
WIRE 432 1216 336 1216
|
||||
FLAG -112 -368 0
|
||||
FLAG -112 -448 +12V
|
||||
FLAG -224 -448 -12V
|
||||
FLAG -224 -368 0
|
||||
FLAG 0 800 0
|
||||
FLAG 112 848 +12V
|
||||
FLAG 288 752 +12V
|
||||
FLAG 496 624 +12V
|
||||
FLAG 240 1088 +12V
|
||||
FLAG 288 944 -12V
|
||||
FLAG 496 688 -12V
|
||||
FLAG 240 1152 -12V
|
||||
FLAG -96 992 0
|
||||
FLAG 144 992 0
|
||||
FLAG 192 1168 0
|
||||
FLAG 416 688 0
|
||||
FLAG 0 -64 0
|
||||
FLAG 112 -16 +12V
|
||||
FLAG 288 -112 +12V
|
||||
FLAG 496 -240 +12V
|
||||
FLAG 240 224 +12V
|
||||
FLAG 288 80 -12V
|
||||
FLAG 496 -176 -12V
|
||||
FLAG 240 288 -12V
|
||||
FLAG -96 128 0
|
||||
FLAG 144 128 0
|
||||
FLAG 192 304 0
|
||||
FLAG -720 576 0
|
||||
FLAG 416 -176 0
|
||||
FLAG -320 208 +12V
|
||||
FLAG -320 272 -12V
|
||||
FLAG -304 32 0
|
||||
FLAG -224 -96 0
|
||||
FLAG -224 -176 5V
|
||||
FLAG -480 336 5V
|
||||
FLAG -320 784 +12V
|
||||
FLAG -320 848 -12V
|
||||
FLAG -368 960 0
|
||||
FLAG -480 832 5V
|
||||
FLAG 928 752 0
|
||||
FLAG 1216 704 +12V
|
||||
FLAG 1424 576 +12V
|
||||
FLAG 1168 1040 +12V
|
||||
FLAG 1216 896 -12V
|
||||
FLAG 1424 640 -12V
|
||||
FLAG 1168 1104 -12V
|
||||
FLAG 1072 944 0
|
||||
FLAG 928 -112 0
|
||||
FLAG 1216 -160 +12V
|
||||
FLAG 1056 352 +12V
|
||||
FLAG 1216 32 -12V
|
||||
FLAG 1424 -224 -12V
|
||||
FLAG 1056 416 -12V
|
||||
FLAG 1072 80 0
|
||||
FLAG 624 592 0
|
||||
FLAG 1168 192 -12V
|
||||
FLAG 560 288 +12V
|
||||
FLAG 560 352 -12V
|
||||
FLAG 736 320 +12V
|
||||
FLAG 736 384 -12V
|
||||
FLAG 896 160 +12V
|
||||
FLAG 896 224 -12V
|
||||
FLAG 832 -128 0
|
||||
FLAG 720 -240 +12V
|
||||
FLAG 848 240 0
|
||||
FLAG 688 416 0
|
||||
FLAG 976 480 0
|
||||
FLAG 1424 -288 +12V
|
||||
FLAG 1312 -384 0
|
||||
FLAG 832 -288 +12V
|
||||
FLAG 384 432 +12V
|
||||
FLAG 928 -208 -12V
|
||||
FLAG 1360 1168 0
|
||||
FLAG 1536 928 -12V
|
||||
FLAG 1264 544 0
|
||||
FLAG 944 656 +12V
|
||||
FLAG 1056 784 -12V
|
||||
SYMBOL voltage -112 -464 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V1
|
||||
SYMATTR Value 12
|
||||
SYMBOL voltage -224 -464 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V2
|
||||
SYMATTR Value -12
|
||||
SYMBOL LM13700 256 768 R0
|
||||
SYMATTR InstName U4
|
||||
SYMBOL res 208 768 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 -16 15 VTop 2
|
||||
SYMATTR InstName R10
|
||||
SYMATTR Value 22
|
||||
SYMBOL res 112 768 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R11
|
||||
SYMATTR Value 470
|
||||
SYMBOL res 208 832 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R12
|
||||
SYMATTR Value 12k
|
||||
SYMBOL voltage -96 896 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V5
|
||||
SYMATTR Value SINE(0 5 400)
|
||||
SYMBOL res 64 896 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R13
|
||||
SYMATTR Value 21k
|
||||
SYMBOL res 160 1008 R180
|
||||
WINDOW 0 36 76 Left 2
|
||||
WINDOW 3 36 40 Left 2
|
||||
SYMATTR InstName R14
|
||||
SYMATTR Value 510
|
||||
SYMBOL TL072 496 592 R0
|
||||
SYMATTR InstName U5
|
||||
SYMBOL TL072 240 1056 R0
|
||||
SYMATTR InstName U6
|
||||
SYMBOL res 176 1088 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R15
|
||||
SYMATTR Value 6k8
|
||||
SYMBOL res 592 512 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R16
|
||||
SYMATTR Value 560
|
||||
SYMBOL res 512 512 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R17
|
||||
SYMATTR Value 15k
|
||||
SYMBOL res 368 704 R0
|
||||
WINDOW 0 42 52 Left 2
|
||||
SYMATTR InstName R18
|
||||
SYMATTR Value 7k2
|
||||
SYMBOL pnp 368 992 R0
|
||||
SYMATTR InstName Q2
|
||||
SYMATTR Value 2N3906
|
||||
SYMBOL diode 320 1104 R0
|
||||
SYMATTR InstName D2
|
||||
SYMATTR Value 1N4148
|
||||
SYMBOL LM13700 256 -96 R0
|
||||
SYMATTR InstName U1
|
||||
SYMBOL res 208 -96 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 -19 21 VTop 2
|
||||
SYMATTR InstName R1
|
||||
SYMATTR Value 22
|
||||
SYMBOL res 112 -96 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R2
|
||||
SYMATTR Value 470
|
||||
SYMBOL res 208 -32 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R3
|
||||
SYMATTR Value 12k
|
||||
SYMBOL voltage -96 32 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V3
|
||||
SYMATTR Value SINE(0 5 200)
|
||||
SYMBOL res 64 32 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R4
|
||||
SYMATTR Value 21k
|
||||
SYMBOL res 160 144 R180
|
||||
WINDOW 0 36 76 Left 2
|
||||
WINDOW 3 36 40 Left 2
|
||||
SYMATTR InstName R5
|
||||
SYMATTR Value 510
|
||||
SYMBOL TL072 496 -272 R0
|
||||
SYMATTR InstName U2
|
||||
SYMBOL TL072 240 192 R0
|
||||
SYMATTR InstName U3
|
||||
SYMBOL res 176 224 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R6
|
||||
SYMATTR Value 6k8
|
||||
SYMBOL res 592 -352 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R7
|
||||
SYMATTR Value 560
|
||||
SYMBOL res 512 -352 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R8
|
||||
SYMATTR Value 15k
|
||||
SYMBOL res 368 -160 R0
|
||||
WINDOW 0 42 52 Left 2
|
||||
SYMATTR InstName R9
|
||||
SYMATTR Value 7k2
|
||||
SYMBOL pnp 368 128 R0
|
||||
SYMATTR InstName Q1
|
||||
SYMATTR Value 2N3906
|
||||
SYMBOL diode 320 240 R0
|
||||
SYMATTR InstName D1
|
||||
SYMATTR Value 1N4148
|
||||
SYMBOL voltage -720 480 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V4
|
||||
SYMATTR Value PULSE(-5 5 0 .5 .5 0 1)
|
||||
SYMBOL TL072 -320 176 R0
|
||||
SYMATTR InstName U7
|
||||
SYMBOL res -384 240 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R19
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res -384 320 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R20
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res -272 144 R0
|
||||
SYMATTR InstName R21
|
||||
SYMATTR Value 200k
|
||||
SYMBOL res -272 16 R0
|
||||
SYMATTR InstName R22
|
||||
SYMATTR Value 200k
|
||||
SYMBOL voltage -224 -192 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V6
|
||||
SYMATTR Value 5V
|
||||
SYMBOL TL072 -320 752 R0
|
||||
SYMATTR InstName U8
|
||||
SYMBOL res -384 736 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R23
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res -384 816 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R24
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res -256 656 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R25
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res -384 864 R0
|
||||
SYMATTR InstName R26
|
||||
SYMATTR Value 100k
|
||||
SYMBOL LM13700 1184 720 R0
|
||||
SYMATTR InstName U9
|
||||
SYMBOL res 1216 624 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 -16 15 VTop 2
|
||||
SYMATTR InstName R27
|
||||
SYMATTR Value 47k
|
||||
SYMBOL res 1040 720 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R28
|
||||
SYMATTR Value 680
|
||||
SYMBOL res 992 848 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R30
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 1088 960 R180
|
||||
WINDOW 0 36 76 Left 2
|
||||
WINDOW 3 36 40 Left 2
|
||||
SYMATTR InstName R31
|
||||
SYMATTR Value 680
|
||||
SYMBOL TL072 1424 544 R0
|
||||
SYMATTR InstName U10
|
||||
SYMBOL TL072 1168 1008 R0
|
||||
SYMATTR InstName U11
|
||||
SYMBOL res 1360 528 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R33
|
||||
SYMATTR Value 68k
|
||||
SYMBOL res 1440 464 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R34
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 1296 656 R0
|
||||
WINDOW 0 42 52 Left 2
|
||||
SYMATTR InstName R35
|
||||
SYMATTR Value 15k
|
||||
SYMBOL pnp 1296 944 R0
|
||||
SYMATTR InstName Q3
|
||||
SYMATTR Value 2N3906
|
||||
SYMBOL cap 1456 384 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C3
|
||||
SYMATTR Value 22p
|
||||
SYMBOL LM13700 1184 -144 R0
|
||||
SYMATTR InstName U12
|
||||
SYMBOL res 1040 -144 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R37
|
||||
SYMATTR Value 680
|
||||
SYMBOL res 992 -16 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R39
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 1088 96 R180
|
||||
WINDOW 0 36 76 Left 2
|
||||
WINDOW 3 36 40 Left 2
|
||||
SYMATTR InstName R40
|
||||
SYMATTR Value 680
|
||||
SYMBOL TL072 1424 -320 R0
|
||||
SYMATTR InstName U13
|
||||
SYMBOL TL072 1056 320 R0
|
||||
SYMATTR InstName U14
|
||||
SYMBOL pnp 1184 256 R0
|
||||
SYMATTR InstName Q4
|
||||
SYMATTR Value 2N3906
|
||||
SYMBOL voltage 624 496 R0
|
||||
WINDOW 123 0 0 Left 0
|
||||
WINDOW 39 0 0 Left 0
|
||||
SYMATTR InstName V8
|
||||
SYMATTR Value PULSE(0 10 0 .25 .25 0 .5)
|
||||
SYMBOL res 1264 176 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R38
|
||||
SYMATTR Value 680k
|
||||
SYMBOL res 1328 48 R0
|
||||
SYMATTR InstName R41
|
||||
SYMATTR Value 15k
|
||||
SYMBOL TL072 560 256 R0
|
||||
SYMATTR InstName U15
|
||||
SYMBOL TL072 736 288 R0
|
||||
SYMATTR InstName U16
|
||||
SYMBOL TL072 896 128 R0
|
||||
SYMATTR InstName U17
|
||||
SYMBOL res 720 240 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R42
|
||||
SYMATTR Value 1Meg
|
||||
SYMBOL res 816 240 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R43
|
||||
SYMATTR Value 10k
|
||||
SYMBOL cap 784 192 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C1
|
||||
SYMATTR Value 100p
|
||||
SYMBOL npn 656 -160 R0
|
||||
SYMATTR InstName Q5
|
||||
SYMATTR Value BC847C
|
||||
SYMBOL npn 832 -160 M0
|
||||
SYMATTR InstName Q6
|
||||
SYMATTR Value BC847C
|
||||
SYMBOL res 704 -256 R0
|
||||
SYMATTR InstName R44
|
||||
SYMATTR Value 10Meg
|
||||
SYMBOL res 736 -64 R0
|
||||
SYMATTR InstName R45
|
||||
SYMATTR Value 1k5
|
||||
SYMBOL cap 880 96 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C2
|
||||
SYMATTR Value 100p
|
||||
SYMBOL res 1488 -400 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R46
|
||||
SYMATTR Value 100k
|
||||
SYMBOL res 1408 -400 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R47
|
||||
SYMATTR Value 68k
|
||||
SYMBOL res 1104 -304 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R36
|
||||
SYMATTR Value 1Meg
|
||||
SYMBOL res 928 -304 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R48
|
||||
SYMATTR Value 50k
|
||||
SYMBOL res 1248 -304 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R49
|
||||
SYMATTR Value 47k
|
||||
SYMBOL cap 1232 -384 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C4
|
||||
SYMATTR Value 100p
|
||||
SYMBOL res 624 416 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R50
|
||||
SYMATTR Value 1k
|
||||
SYMBOL res 480 416 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R51
|
||||
SYMATTR Value 1Meg
|
||||
SYMBOL res 912 -304 R0
|
||||
SYMATTR InstName R52
|
||||
SYMATTR Value 50k
|
||||
SYMBOL cap 1472 -480 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C5
|
||||
SYMATTR Value 22p
|
||||
SYMBOL res 1552 912 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R32
|
||||
SYMATTR Value 680k
|
||||
SYMBOL cap 1168 544 R90
|
||||
WINDOW 0 0 32 VBottom 2
|
||||
WINDOW 3 32 32 VTop 2
|
||||
SYMATTR InstName C6
|
||||
SYMATTR Value 100p
|
||||
SYMBOL res 1040 640 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R29
|
||||
SYMATTR Value 50k
|
||||
SYMBOL res 1040 688 R0
|
||||
SYMATTR InstName R53
|
||||
SYMATTR Value 50k
|
||||
SYMBOL res 1120 544 R90
|
||||
WINDOW 0 0 56 VBottom 2
|
||||
WINDOW 3 32 56 VTop 2
|
||||
SYMATTR InstName R54
|
||||
SYMATTR Value 1Meg
|
||||
TEXT -146 -584 Left 2 !.tran 1
|
||||
TEXT -576 -504 Left 2 !.include lm13700.sub
|
||||
6195
stereo_mix_old/hardware_design/pcb/stereo_mix_back_digital.brd
Normal file
6195
stereo_mix_old/hardware_design/pcb/stereo_mix_back_digital.brd
Normal file
File diff suppressed because it is too large
Load diff
21573
stereo_mix_old/hardware_design/pcb/stereo_mix_back_digital.sch
Normal file
21573
stereo_mix_old/hardware_design/pcb/stereo_mix_back_digital.sch
Normal file
File diff suppressed because it is too large
Load diff
1425
stereo_mix_old/hardware_design/pcb/stereo_mix_front.brd
Normal file
1425
stereo_mix_old/hardware_design/pcb/stereo_mix_front.brd
Normal file
File diff suppressed because it is too large
Load diff
17851
stereo_mix_old/hardware_design/pcb/stereo_mix_front.sch
Normal file
17851
stereo_mix_old/hardware_design/pcb/stereo_mix_front.sch
Normal file
File diff suppressed because it is too large
Load diff
43
stereo_mix_old/makefile
Normal file
43
stereo_mix_old/makefile
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
# Copyright 2012 Emilie Gillet.
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
VERSION = 0.1
|
||||
MCU_NAME = 328
|
||||
TARGET = stereo_mix
|
||||
PACKAGES = avrlib avrlib/devices stereo_mix
|
||||
RESOURCES = stereo_mix/resources
|
||||
PROGRAMMER = atmelice_isp
|
||||
|
||||
LFUSE = ef
|
||||
HFUSE = d8
|
||||
EFUSE = 05
|
||||
LOCK = ff
|
||||
|
||||
include avrlib/makefile.mk
|
||||
|
||||
include $(DEP_FILE)
|
||||
|
||||
# Rule for building the firmware update file
|
||||
wav: $(TARGET_BIN)
|
||||
python avr_audio_bootloader/fsk/encoder.py \
|
||||
-s 40000 -b 16 -n 8 -z 4 -p 128 -g 128 -k 10 \
|
||||
$(TARGET_BIN)
|
||||
|
||||
bootstrap_all:
|
||||
make -f stereo_mix/makefile
|
||||
make -f stereo_mix/bootloader/makefile
|
||||
make -f stereo_mix/bootloader/makefile fuses
|
||||
$(AVRDUDE) -B 1 $(AVRDUDE_COM_OPTS) $(AVRDUDE_ISP_OPTS) \
|
||||
-U flash:w:build/stereo_mix/stereo_mix.hex:i \
|
||||
-U flash:w:build/stereo_mix_bootloader/stereo_mix_bootloader.hex:i \
|
||||
-U lock:w:0xff:m
|
||||
0
stereo_mix_old/resources/__init__.py
Normal file
0
stereo_mix_old/resources/__init__.py
Normal file
29
stereo_mix_old/resources/lookup_tables.py
Normal file
29
stereo_mix_old/resources/lookup_tables.py
Normal file
|
|
@ -0,0 +1,29 @@
|
|||
import numpy as np
|
||||
lookup_tables = []
|
||||
lookup_tables_32 = []
|
||||
|
||||
ADC_RESOLUTION = 512
|
||||
OUTPUT_RESOLUTION = 4096
|
||||
|
||||
# linear to exponential conversion
|
||||
|
||||
values = np.linspace(0, 1, num=ADC_RESOLUTION)
|
||||
values = np.power(values, 2) * OUTPUT_RESOLUTION
|
||||
|
||||
lookup_tables.append(('linear_to_exp', values))
|
||||
|
||||
|
||||
# Left pan Lookup table
|
||||
|
||||
l_pan = np.linspace(0, 1, num=ADC_RESOLUTION)
|
||||
r_pan = np.linspace(0, 1, num=ADC_RESOLUTION)
|
||||
|
||||
l_pan = np.sin(l_pan * (np.pi / 2.0))
|
||||
r_pan = np.cos(r_pan * (np.pi / 2.0))
|
||||
|
||||
l_pan = np.round(l_pan * OUTPUT_RESOLUTION)
|
||||
r_pan = np.round(r_pan * OUTPUT_RESOLUTION)
|
||||
|
||||
lookup_tables.append(('left_sin_pan', l_pan))
|
||||
lookup_tables.append(('right_cos_pan', r_pan))
|
||||
|
||||
64
stereo_mix_old/resources/resources.py
Normal file
64
stereo_mix_old/resources/resources.py
Normal file
|
|
@ -0,0 +1,64 @@
|
|||
#!/usr/bin/python2.5
|
||||
#
|
||||
# Copyright 2012 Emilie Gillet.
|
||||
#
|
||||
# Author: Emilie Gillet (emilie.o.gillet@gmail.com)
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
# -----------------------------------------------------------------------------
|
||||
#
|
||||
# Master resources file.
|
||||
|
||||
header = """// Copyright 2019 Jan-Henrik Bruhn.
|
||||
//
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
//
|
||||
// -----------------------------------------------------------------------------
|
||||
//
|
||||
// Resources definitions.
|
||||
//
|
||||
// Automatically generated with:
|
||||
// make resources
|
||||
"""
|
||||
|
||||
namespace = 'stereo_mix'
|
||||
target = 'stereo_mix'
|
||||
modifier = 'PROGMEM'
|
||||
types = ['uint8_t', 'uint16_t']
|
||||
includes = """
|
||||
#include "avrlib/avrlib.h"
|
||||
#include <avr/pgmspace.h>
|
||||
"""
|
||||
|
||||
import lookup_tables
|
||||
|
||||
create_specialized_manager = False
|
||||
|
||||
resources = [
|
||||
('dummy', 'string', 'STR_RES', 'prog_char', str, True),
|
||||
(lookup_tables.lookup_tables,
|
||||
'lookup_table', 'LUT_RES', 'prog_uint16_t', int, True),
|
||||
(lookup_tables.lookup_tables_32,
|
||||
'lookup_table_32', 'LUT_RES', 'prog_uint32_t', int, True)
|
||||
]
|
||||
|
||||
91
stereo_mix_old/stereo_mix.cc
Normal file
91
stereo_mix_old/stereo_mix.cc
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
#include "avrlib/adc.h"
|
||||
#include "avrlib/avrlib.h"
|
||||
#include "avrlib/boot.h"
|
||||
#include "avrlib/devices/mcp492x.h"
|
||||
#include "avrlib/gpio.h"
|
||||
#include "avrlib/spi.h"
|
||||
#include "avrlib/time.h"
|
||||
#include "avrlib/watchdog_timer.h"
|
||||
#include "stereo_mix/resources.h"
|
||||
|
||||
using namespace avrlib;
|
||||
using namespace stereo_mix;
|
||||
|
||||
typedef SpiMaster<NumberedGpio<0>, MSB_FIRST, 2> dac1Spi;
|
||||
typedef Dac<dac1Spi, BUFFERED_REFERENCE, 1> Dac1;
|
||||
typedef SpiMaster<NumberedGpio<1>, MSB_FIRST, 2> dac2Spi;
|
||||
typedef Dac<dac2Spi, BUFFERED_REFERENCE, 1> Dac2;
|
||||
typedef SpiMaster<NumberedGpio<2>, MSB_FIRST, 2> dac3Spi;
|
||||
typedef Dac<dac3Spi, BUFFERED_REFERENCE, 1> Dac3;
|
||||
typedef SpiMaster<NumberedGpio<3>, MSB_FIRST, 2> dac4Spi;
|
||||
typedef Dac<dac4Spi, BUFFERED_REFERENCE, 1> Dac4;
|
||||
|
||||
typedef SpiMaster<NumberedGpio<4>, MSB_FIRST, 2> oDac1Spi;
|
||||
typedef Dac<oDac1Spi, BUFFERED_REFERENCE, 0> oDac1;
|
||||
typedef SpiMaster<NumberedGpio<5>, MSB_FIRST, 2> oDac2Spi;
|
||||
typedef Dac<oDac2Spi, BUFFERED_REFERENCE, 0> oDac2;
|
||||
typedef SpiMaster<NumberedGpio<6>, MSB_FIRST, 2> oDac3Spi;
|
||||
typedef Dac<oDac3Spi, BUFFERED_REFERENCE, 0> oDac3;
|
||||
typedef SpiMaster<NumberedGpio<7>, MSB_FIRST, 2> oDac4Spi;
|
||||
typedef Dac<oDac4Spi, BUFFERED_REFERENCE, 0> oDac4;
|
||||
|
||||
typedef AdcInputScanner AnalogInputs;
|
||||
|
||||
#define NUM_CHANNELS 4
|
||||
|
||||
uint32_t volume[NUM_CHANNELS];
|
||||
uint16_t pan[NUM_CHANNELS * 2];
|
||||
|
||||
int main(void)
|
||||
{
|
||||
Boot(true);
|
||||
Dac1::Init();
|
||||
Dac2::Init();
|
||||
Dac3::Init();
|
||||
Dac4::Init();
|
||||
|
||||
oDac1::Init();
|
||||
oDac2::Init();
|
||||
oDac3::Init();
|
||||
oDac4::Init();
|
||||
|
||||
AnalogInputs::Init();
|
||||
|
||||
AnalogInputs::set_num_inputs(8);
|
||||
|
||||
#define WRITE(DAC, ODAC, N) \
|
||||
DAC::Write((volume[N] * pan[N * NUM_CHANNELS]) >> 12, 0); \
|
||||
ODAC::Write((volume[N] * pan[N * NUM_CHANNELS]) >> 12, 0); \
|
||||
DAC::Write((volume[N] * pan[N * NUM_CHANNELS + 1]) >> 12, 1); \
|
||||
ODAC::Write((volume[N] * pan[N * NUM_CHANNELS + 1]) >> 12, 1);
|
||||
|
||||
while (true) {
|
||||
ResetWatchdog();
|
||||
|
||||
int i = AnalogInputs::current_pin() % NUM_CHANNELS;
|
||||
volume[i] = pgm_read_word_near(lut_res_linear_to_exp + (AnalogInputs::Read(i) >> 1));
|
||||
pan[i * NUM_CHANNELS] = pgm_read_word(lut_res_left_sin_pan + (AnalogInputs::Read(i + NUM_CHANNELS) >> 1));
|
||||
pan[i * NUM_CHANNELS + 1] = pgm_read_word(lut_res_right_cos_pan + (AnalogInputs::Read(i + NUM_CHANNELS) >> 1));
|
||||
|
||||
switch (i) {
|
||||
case 0:
|
||||
WRITE(Dac1, oDac1, i);
|
||||
break;
|
||||
case 1:
|
||||
WRITE(Dac2, oDac2, i);
|
||||
break;
|
||||
case 2:
|
||||
WRITE(Dac3, oDac3, i);
|
||||
break;
|
||||
case 3:
|
||||
WRITE(Dac4, oDac4, i);
|
||||
break;
|
||||
}
|
||||
AnalogInputs::Scan();
|
||||
}
|
||||
}
|
||||
|
||||
TIMER_0_TICK
|
||||
{
|
||||
TickSystemClock();
|
||||
}
|
||||
Loading…
Reference in a new issue